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/* bspstart.c
*
* This set of routines starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before this routine is invoked.
*
* COPYRIGHT (c) 1989-2007.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Modifications for MBX860:
* Copyright (c) 1999, National Research Council of Canada
*
* $Id$
*/
#include <bsp.h>
/*
* Driver configuration parameters
*/
uint32_t bsp_clicks_per_usec;
uint32_t bsp_serial_per_sec; /* Serial clocks per second */
bool bsp_serial_external_clock;
bool bsp_serial_xon_xoff;
bool bsp_serial_cts_rts;
uint32_t bsp_serial_rate;
uint32_t bsp_timer_average_overhead; /* Average overhead of timer in ticks */
uint32_t bsp_timer_least_valid; /* Least valid number from timer */
bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */
/*
* bsp_start()
*
* Board-specific initialization code. Called from the generic boot_card()
* function defined in rtems/c/src/lib/libbsp/shared/main.c. That function
* does some of the board independent initialization. It is called from the
* MBX8xx entry point _start() defined in
* rtems/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
*
* _start() has set up a stack, has zeroed the .bss section, has turned off
* interrupts, and placed the processor in the supervisor mode. boot_card()
* has left the processor in that state when bsp_start() was called.
*
* RUNS WITH ADDRESS TRANSLATION AND CACHING TURNED OFF!
* ASSUMES THAT THE VIRTUAL ADDRESSES WILL BE IDENTICAL TO THE PHYSICAL
* ADDRESSES. Software-controlled address translation would be required
* otherwise.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values: NONE
*/
void bsp_start(void)
{
uint32_t r1;
mmu_init();
/*
* Enable instruction and data caches. Do not force writethrough mode.
*/
#ifdef INSTRUCTION_CACHE_ENABLE
r1 = M8xx_CACHE_CMD_ENABLE;
_mtspr( M8xx_IC_CST, r1 );
_isync;
#endif
/*
* Warning: EPPCBug 1.1 chokes to death if the data cache is turned on.
* Set DATA_CACHE_ENABLE to zero in mbx8xx.cfg if EPPCBUG is used.
*/
#ifdef DATA_CACHE_ENABLE
r1 = M8xx_CACHE_CMD_ENABLE;
_mtspr( M8xx_DC_CST, r1 );
_isync;
#endif
/*
* initialize the device driver parameters
*/
bsp_clicks_per_usec = 1; /* for 4MHz extclk */
bsp_serial_per_sec = 10000000;
bsp_serial_external_clock = 1;
bsp_serial_xon_xoff = 0;
bsp_serial_cts_rts = 1;
bsp_serial_rate = 9600;
#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
bsp_clock_speed = 50000000;
bsp_timer_average_overhead = 3;
bsp_timer_least_valid = 3;
#else
bsp_clock_speed = 40000000;
bsp_timer_average_overhead = 3;
bsp_timer_least_valid = 3;
#endif
m8xx.scc2.sccm=0;
m8xx.scc2p.rbase=0;
m8xx.scc2p.tbase=0;
m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
}
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