blob: 6ed68e24bfafc4550b1bd2aeea9d778cb133d004 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
|
/**
* @file tms570-sci.h
*
* @ingroup tms570
*
* @brief Serial Communication Interface (SCI) header file.
*/
/*
* Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
*
* Google Summer of Code 2014 at
* Czech Technical University in Prague
* Zikova 1903/4
* 166 36 Praha 6
* Czech Republic
*
* Based on LPC24xx and LPC1768 BSP
* by embedded brains GmbH and others
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef LIBBSP_ARM_TMS570_SCI_H
#define LIBBSP_ARM_TMS570_SCI_H
#include <libchip/serial.h>
#include <rtems.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
typedef struct {
uint32_t SCIGCR0; /*SCIGlobalControlRegister0*/
uint32_t SCIGCR1; /*SCIGlobalControlRegister1*/
uint32_t reserved1 [0x4/4];
uint32_t SCISETINT; /*SCISetInterruptRegister*/
uint32_t SCICLEARINT; /*SCIClearInterruptRegister*/
uint32_t SCISETINTLVL; /*SCISetInterruptLevelRegister*/
uint32_t SCICLEARINTLVL; /*SCIClearInterruptLevelRegister*/
uint32_t SCIFLR; /*SCIFlagsRegister*/
uint32_t SCIINTVECT0; /*SCIInterruptVectorOffset0*/
uint32_t SCIINTVECT1; /*SCIInterruptVectorOffset1*/
uint32_t SCIFORMAT; /*SCIFormatControlRegister*/
uint32_t BRS; /*BaudRateSelectionRegister*/
uint32_t SCIED; /*ReceiverEmulationDataBuffer*/
uint32_t SCIRD; /*ReceiverDataBuffer*/
uint32_t SCITD; /*TransmitDataBuffer*/
uint32_t SCIPIO0; /*SCIPinI/OControlRegister0*/
uint32_t SCIPIO1; /*SCIPinI/OControlRegister1*/
uint32_t SCIPIO2; /*SCIPinI/OControlRegister2*/
uint32_t SCIPIO3; /*SCIPinI/OControlRegister3*/
uint32_t SCIPIO4; /*SCIPinI/OControlRegister4*/
uint32_t SCIPIO5; /*SCIPinI/OControlRegister5*/
uint32_t SCIPIO6; /*SCIPinI/OControlRegister6*/
uint32_t SCIPIO7; /*SCIPinI/OControlRegister7*/
uint32_t SCIPIO8; /*SCIPinI/OControlRegister8*/
uint32_t reserved2 [0x30/4];
uint32_t IODFTCTRL; /*Input/OutputErrorEnableRegister*/
}tms570_sci_t;
#define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E400U)
#define TMS570_SCI2 (*(volatile tms570_sci_t*)0xFFF7E500U)
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif
|