blob: c815e00e40935b1ff9f98a887f913a95bea6f4cd (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
/*
* COPYRIGHT (c) 2012-2015
* Cobham Gaisler
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
static inline int bsp_irq_cpu(int irq)
{
#if defined(RTEMS_SMP)
Processor_mask affinity;
(void) bsp_interrupt_get_affinity((rtems_vector_number) irq, &affinity);
return (int) _Processor_mask_Find_last_set(&affinity);
#elif defined(LEON3)
return _LEON3_Get_current_processor();
#else
return 0;
#endif
}
#if !defined(LEON3)
bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
{
if (vector == 0) {
return false;
}
return vector <= BSP_INTERRUPT_VECTOR_MAX_STD;
}
void bsp_interrupt_facility_initialize(void)
{
/* Nothing to do */
}
static bool is_maskable(rtems_vector_number vector)
{
return vector != 15;
}
rtems_status_code bsp_interrupt_get_attributes(
rtems_vector_number vector,
rtems_interrupt_attributes *attributes
)
{
attributes->is_maskable = is_maskable(vector);
attributes->can_enable = true;
attributes->maybe_enable = true;
attributes->can_disable = is_maskable(vector);
attributes->maybe_disable = is_maskable(vector);
attributes->can_raise = true;
attributes->can_raise_on = true;
attributes->can_clear = true;
attributes->cleared_by_acknowledge = true;
attributes->can_set_affinity = true;
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_is_pending(
rtems_vector_number vector,
bool *pending
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(pending != NULL);
*pending = BSP_Is_interrupt_pending(vector) ||
BSP_Is_interrupt_forced(vector);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
BSP_Force_interrupt(vector);
return RTEMS_SUCCESSFUL;
}
#if defined(RTEMS_SMP)
rtems_status_code bsp_interrupt_raise_on(
rtems_vector_number vector,
uint32_t cpu_index
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
BSP_Force_interrupt(vector);
return RTEMS_SUCCESSFUL;
}
#endif
rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
BSP_Clear_forced_interrupt(vector);
BSP_Clear_interrupt(vector);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_is_enabled(
rtems_vector_number vector,
bool *enabled
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(enabled != NULL);
*enabled = !BSP_Cpu_Is_interrupt_masked(vector, bsp_irq_cpu(vector));
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
BSP_Cpu_Unmask_interrupt(vector, 0);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
if (!is_maskable(vector)) {
return RTEMS_UNSATISFIED;
}
BSP_Cpu_Mask_interrupt(vector, 0);
return RTEMS_SUCCESSFUL;
}
#endif
void BSP_shared_interrupt_mask(int irq)
{
BSP_Cpu_Mask_interrupt(irq, bsp_irq_cpu(irq));
}
void BSP_shared_interrupt_unmask(int irq)
{
BSP_Cpu_Unmask_interrupt(irq, bsp_irq_cpu(irq));
}
void BSP_shared_interrupt_clear(int irq)
{
/* We don't have to interrupt lock here, because the register is only
* written and self clearing
*/
BSP_Clear_interrupt(irq);
}
|
