1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
/**
* @file
*
* @ingroup mpc55xx
*
* @brief Clock and FMPLL configuration.
*/
/*
* Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp/mpc55xx-config.h>
const mpc55xx_clock_config mpc55xx_start_config_clock [1] = { {
#ifdef MPC55XX_HAS_FMPLL
.syncr_tmp = {
.B = {
.PREDIV = MPC55XX_FMPLL_PREDIV - 1,
.MFD = MPC55XX_FMPLL_MFD,
.RFD = 2,
.LOCEN = 1
}
},
.syncr_final = {
.B = {
.PREDIV = MPC55XX_FMPLL_PREDIV - 1,
.MFD = MPC55XX_FMPLL_MFD,
.RFD = 0,
.LOCEN = 1,
.LOLIRQ = 1,
.LOCIRQ = 1
}
}
#endif
#ifdef MPC55XX_HAS_FMPLL_ENHANCED
#define EPREDIV_VAL (MPC55XX_FMPLL_PREDIV-1)
#define EMFD_VAL (MPC55XX_FMPLL_MFD-16)
#define VCO_CLK_REF (MPC55XX_REFERENCE_CLOCK/(EPREDIV_VAL+1))
#define VCO_CLK_OUT (VCO_CLK_REF*(EMFD_VAL+16))
#define ERFD_VAL \
(((VCO_CLK_OUT + MPC55XX_SYSTEM_CLOCK - 1) / MPC55XX_SYSTEM_CLOCK)-1)
.esyncr2_tmp = {
.B = {
.LOCEN = 0,
.LOLRE = 0,
.LOCRE = 0,
.LOLIRQ = 0,
.LOCIRQ = 0,
.ERATE = 0,
.EDEPTH = 0,
.ERFD = ERFD_VAL + 2 /* reduce output clock during init */
}
},
.esyncr2_final = {
.B = {
.LOCEN = 0,
.LOLRE = 0,
.LOCRE = 0,
.LOLIRQ = 0,
.LOCIRQ = 0,
.ERATE = 0,
#if MPC55XX_CHIP_FAMILY == 567
.CLKCFG_DIS = 1,
#endif
.EDEPTH = 0,
.ERFD = ERFD_VAL /* nominal output clock after init */
}
},
.esyncr1_final = {
.B = {
.CLKCFG = MPC55XX_FMPLL_ESYNCR1_CLKCFG,
.EPREDIV = EPREDIV_VAL,
.EMFD = EMFD_VAL
}
}
#endif
#ifdef MPC55XX_HAS_MODE_CONTROL
.fmpll = {
{
.cr = {
#if MPC55XX_REFERENCE_CLOCK == 8000000
.B = { .IDF = 0, .ODF = 1, .NDIV = 60, .I_LOCK = 1, .PLL_ON = 1 }
#elif MPC55XX_REFERENCE_CLOCK == 40000000
.B = { .IDF = 3, .ODF = 1, .NDIV = 48, .I_LOCK = 1, .PLL_ON = 1 }
#else
#error "unexpected reference clock"
#endif
}
},
{
.cr = {
.B = { .IDF = 3, .ODF = 2, .NDIV = 32, .I_LOCK = 1, .PLL_ON = 1 }
}
}
},
.ocds_sc = {
.B = { .SELDIV = 2, .SELCTL = 2 }
},
.auxclk = {
[0] = {
.AC_SC = { .B = { .SELCTL = 4 } },
.AC_DC0_3 = { .B = { .DE0 = 1, .DIV0 = 0 } }
},
[1] = {
.AC_SC = { .B = { .SELCTL = 4 } },
.AC_DC0_3 = { .B = { .DE0 = 1, .DIV0 = 11 } }
},
[2] = {
.AC_SC = { .B = { .SELCTL = 4 } },
.AC_DC0_3 = { .B = { .DE0 = 1, .DIV0 = 11 } }
},
[3] = {
.AC_SC = { .B = { .SELCTL = 1 } }
},
[4] = {
.AC_SC = { .B = { .SELCTL = 1 } }
}
}
#endif
} };
|
