summaryrefslogtreecommitdiffstats
path: root/bsps/arm/lpc32xx/include/bsp/boot.h
blob: 3f1c3531b25c364cb06370c064a0674893089e73 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
/**
 * @file
 *
 * @ingroup lpc32xx_boot
 *
 * @brief Boot support API.
 */

/*
 * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
 *
 * The license and distribution terms for this file may be
 * found in the file LICENSE in this distribution or at
 * http://www.rtems.org/license/LICENSE.
 */

#ifndef LIBBSP_ARM_LPC32XX_BOOT_H
#define LIBBSP_ARM_LPC32XX_BOOT_H

#include <stdint.h>

#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */

/**
 * @defgroup lpc32xx_boot Boot Support
 *
 * @ingroup RTEMSBSPsARMLPC32XX
 *
 * @brief Boot support.
 *
 * The NXP internal boot program shall be the "stage-0 program".
 *
 * The boot program within the first page of the first or second block shall be
 * "stage-1 program".  It will be invoked by the stage-0 program from NXP.
 *
 * The program loaded by the stage-1 program will be the "stage-2 program" or the
 * "boot loader".
 *
 * The program loaded by the stage-2 program will be the "stage-3 program" or the
 * "application".
 *
 * The stage-1 program image must have a format specified by NXP.
 *
 * The stage-2 and stage-3 program images may have any format.
 *
 * @{
 */

#define LPC32XX_BOOT_BLOCK_0 0
#define LPC32XX_BOOT_BLOCK_1 1

#define LPC32XX_BOOT_ICR_SP_3AC_8IF 0xf0
#define LPC32XX_BOOT_ICR_SP_4AC_8IF 0xd2
#define LPC32XX_BOOT_ICR_LP_4AC_8IF 0xb4
#define LPC32XX_BOOT_ICR_LP_5AC_8IF 0x96

typedef union {
  struct {
    uint8_t d0;
    uint8_t reserved_0 [3];
    uint8_t d1;
    uint8_t reserved_1 [3];
    uint8_t d2;
    uint8_t reserved_2 [3];
    uint8_t d3;
    uint8_t reserved_3 [3];
    uint8_t d4;
    uint8_t reserved_4 [3];
    uint8_t d5;
    uint8_t reserved_5 [3];
    uint8_t d6;
    uint8_t reserved_6 [3];
    uint8_t d7;
    uint8_t reserved_7 [3];
    uint8_t d8;
    uint8_t reserved_8 [3];
    uint8_t d9;
    uint8_t reserved_9 [3];
    uint8_t d10;
    uint8_t reserved_10 [3];
    uint8_t d11;
    uint8_t reserved_11 [3];
    uint8_t d12;
    uint8_t reserved_12 [463];
  } field;
  uint32_t data [128];
} lpc32xx_boot_block;

void lpc32xx_setup_boot_block(
  lpc32xx_boot_block *boot_block,
  uint8_t icr,
  uint8_t page_count
);

void lpc32xx_set_boot_block_bad(
  lpc32xx_boot_block *boot_block
);

/** @} */

#ifdef __cplusplus
}
#endif /* __cplusplus */

#endif /* LIBBSP_ARM_LPC32XX_BOOT_H */