summaryrefslogtreecommitdiffstats
path: root/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_enc.c
blob: 8117df1332065f3f126a405d83972102cd2e37c0 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
/*
 * Copyright (c) 2015, Freescale Semiconductor, Inc.
 * Copyright 2016-2019 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include "fsl_enc.h"

/*******************************************************************************
 * Definitions
 ******************************************************************************/

/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.enc"
#endif

#define ENC_CTRL_W1C_FLAGS  (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
#define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)

/*******************************************************************************
 * Prototypes
 ******************************************************************************/
/*!
 * @brief Get instance number for ENC module.
 *
 * @param base ENC peripheral base address
 */
static uint32_t ENC_GetInstance(ENC_Type *base);

/*******************************************************************************
 * Variables
 ******************************************************************************/
/*! @brief Pointers to ENC bases for each instance. */
static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;

#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to ENC clocks for each instance. */
static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */

/*******************************************************************************
 * Code
 ******************************************************************************/
static uint32_t ENC_GetInstance(ENC_Type *base)
{
    uint32_t instance;

    /* Find the instance index from base address mappings. */
    for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
    {
        if (s_encBases[instance] == base)
        {
            break;
        }
    }

    assert(instance < ARRAY_SIZE(s_encBases));

    return instance;
}

/*!
 * brief Initialization for the ENC module.
 *
 * This function is to make the initialization for the ENC module. It should be called firstly before any operation to
 * the ENC with the operations like:
 *  - Enable the clock for ENC module.
 *  - Configure the ENC's working attributes.
 *
 * param base   ENC peripheral base address.
 * param config Pointer to configuration structure. See to "enc_config_t".
 */
void ENC_Init(ENC_Type *base, const enc_config_t *config)
{
    assert(NULL != config);

    uint16_t tmp16;

#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
    /* Enable the clock. */
    CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */

    /* ENC_CTRL. */
    tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
                                      ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
    /* For HOME trigger. */
    if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
    {
        tmp16 |= ENC_CTRL_HIP_MASK;
        if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
        {
            tmp16 |= ENC_CTRL_HNE_MASK;
        }
    }
    /* For encoder work mode. */
    if (config->enableReverseDirection)
    {
        tmp16 |= ENC_CTRL_REV_MASK;
    }
    if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
    {
        tmp16 |= ENC_CTRL_PH1_MASK;
    }
    /* For INDEX trigger. */
    if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
    {
        tmp16 |= ENC_CTRL_XIP_MASK;
        if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
        {
            tmp16 |= ENC_CTRL_XNE_MASK;
        }
    }
    /* Watchdog. */
    if (config->enableWatchdog)
    {
        tmp16 |= ENC_CTRL_WDE_MASK;
        base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
    }
    base->CTRL = tmp16;

    /* ENC_FILT. */
    base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);

    /* ENC_CTRL2. */
    tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
                                       ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
    if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
    {
        tmp16 |= ENC_CTRL2_OUTCTL_MASK;
    }
    if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
    {
        tmp16 |= ENC_CTRL2_REVMOD_MASK;
    }
    if (config->enableModuloCountMode)
    {
        tmp16 |= ENC_CTRL2_MOD_MASK;
        /* Set modulus value. */
        base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
        base->LMOD = (uint16_t)(config->positionModulusValue);        /* Lower 16 bits. */
    }
    if (config->enableTRIGGERClearPositionCounter)
    {
        tmp16 |= ENC_CTRL2_UPDPOS_MASK;
    }
    if (config->enableTRIGGERClearHoldPositionCounter)
    {
        tmp16 |= ENC_CTRL2_UPDHLD_MASK;
    }
    base->CTRL2 = tmp16;

    /* ENC_UCOMP & ENC_LCOMP. */
    base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
    base->LCOMP = (uint16_t)(config->positionCompareValue);        /* Lower 16 bits. */

    /* ENC_UINIT & ENC_LINIT. */
    base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
    base->LINIT = (uint16_t)(config->positionInitialValue);        /* Lower 16 bits. */
}

/*!
 * brief De-initialization for the ENC module.
 *
 * This function is to make the de-initialization for the ENC module. It could be called when ENC is no longer used with
 * the operations like:
 *  - Disable the clock for ENC module.
 *
 * param base ENC peripheral base address.
 */
void ENC_Deinit(ENC_Type *base)
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
    /* Disable the clock. */
    CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
}

/*!
 * brief Get an available pre-defined settings for ENC's configuration.
 *
 * This function initializes the ENC configuration structure with an available settings, the default value are:
 * code
 *   config->enableReverseDirection                = false;
 *   config->decoderWorkMode                       = kENC_DecoderWorkAsNormalMode;
 *   config->HOMETriggerMode                       = kENC_HOMETriggerDisabled;
 *   config->INDEXTriggerMode                      = kENC_INDEXTriggerDisabled;
 *   config->enableTRIGGERClearPositionCounter     = false;
 *   config->enableTRIGGERClearHoldPositionCounter = false;
 *   config->enableWatchdog                        = false;
 *   config->watchdogTimeoutValue                  = 0U;
 *   config->filterCount                           = 0U;
 *   config->filterSamplePeriod                    = 0U;
 *   config->positionMatchMode                     = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
 *   config->positionCompareValue                  = 0xFFFFFFFFU;
 *   config->revolutionCountCondition              = kENC_RevolutionCountOnINDEXPulse;
 *   config->enableModuloCountMode                 = false;
 *   config->positionModulusValue                  = 0U;
 *   config->positionInitialValue                  = 0U;
 * endcode
 * param config Pointer to a variable of configuration structure. See to "enc_config_t".
 */
void ENC_GetDefaultConfig(enc_config_t *config)
{
    assert(NULL != config);

    /* Initializes the configure structure to zero. */
    (void)memset(config, 0, sizeof(*config));

    config->enableReverseDirection                = false;
    config->decoderWorkMode                       = kENC_DecoderWorkAsNormalMode;
    config->HOMETriggerMode                       = kENC_HOMETriggerDisabled;
    config->INDEXTriggerMode                      = kENC_INDEXTriggerDisabled;
    config->enableTRIGGERClearPositionCounter     = false;
    config->enableTRIGGERClearHoldPositionCounter = false;
    config->enableWatchdog                        = false;
    config->watchdogTimeoutValue                  = 0U;
    config->filterCount                           = 0U;
    config->filterSamplePeriod                    = 0U;
    config->positionMatchMode                     = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
    config->positionCompareValue                  = 0xFFFFFFFFU;
    config->revolutionCountCondition              = kENC_RevolutionCountOnINDEXPulse;
    config->enableModuloCountMode                 = false;
    config->positionModulusValue                  = 0U;
    config->positionInitialValue                  = 0U;
}

/*!
 * brief Load the initial position value to position counter.
 *
 * This function is to transfer the initial position value (UINIT and LINIT) contents to position counter (UPOS and
 * LPOS), so that to provide the consistent operation the position counter registers.
 *
 * param base ENC peripheral base address.
 */
void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
{
    uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);

    tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
    base->CTRL = tmp16;
}

/*!
 * brief Enable and configure the self test function.
 *
 * This function is to enable and configuration the self test function. It controls and sets the frequency of a
 * quadrature signal generator. It provides a quadrature test signal to the inputs of the quadrature decoder module.
 * It is a factory test feature; however, it may be useful to customers' software development and testing.
 *
 * param base   ENC peripheral base address.
 * param config Pointer to configuration structure. See to "enc_self_test_config_t". Pass "NULL" to disable.
 */
void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
{
    uint16_t tmp16 = 0U;

    if (NULL == config) /* Pass "NULL" to disable the feature. */
    {
        tmp16 = 0U;
    }
    else
    {
        tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
                ENC_TST_TEST_COUNT(config->signalCount);
        if (kENC_SelfTestDirectionNegative == config->signalDirection)
        {
            tmp16 |= ENC_TST_QDN_MASK;
        }
    }

    base->TST = tmp16;
}

/*!
 * brief Enable watchdog for ENC module.
 *
 * param base ENC peripheral base address
 * param enable Enables or disables the watchdog
 */
void ENC_EnableWatchdog(ENC_Type *base, bool enable)
{
    uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));

    if (enable)
    {
        tmp16 |= ENC_CTRL_WDE_MASK;
    }
    base->CTRL = tmp16;
}

/*!
 * brief  Get the status flags.
 *
 * param  base ENC peripheral base address.
 *
 * return      Mask value of status flags. For available mask, see to "_enc_status_flags".
 */
uint32_t ENC_GetStatusFlags(ENC_Type *base)
{
    uint32_t ret32 = 0U;

    /* ENC_CTRL. */
    if (0U != (ENC_CTRL_HIRQ_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_HOMETransitionFlag;
    }
    if (0U != (ENC_CTRL_XIRQ_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_INDEXPulseFlag;
    }
    if (0U != (ENC_CTRL_DIRQ_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_WatchdogTimeoutFlag;
    }
    if (0U != (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_PositionCompareFlag;
    }

    /* ENC_CTRL2. */
    if (0U != (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_SimultBothPhaseChangeFlag;
    }
    if (0U != (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_PositionRollOverFlag;
    }
    if (0U != (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_PositionRollUnderFlag;
    }
    if (0U != (ENC_CTRL2_DIR_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_LastCountDirectionFlag;
    }

    return ret32;
}

/*!
 * brief Clear the status flags.
 *
 * param base ENC peripheral base address.
 * param mask Mask value of status flags to be cleared. For available mask, see to "_enc_status_flags".
 */
void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
{
    uint32_t tmp16 = 0U;

    /* ENC_CTRL. */
    if (0U != ((uint32_t)kENC_HOMETransitionFlag & mask))
    {
        tmp16 |= ENC_CTRL_HIRQ_MASK;
    }
    if (0U != ((uint32_t)kENC_INDEXPulseFlag & mask))
    {
        tmp16 |= ENC_CTRL_XIRQ_MASK;
    }
    if (0U != ((uint32_t)kENC_WatchdogTimeoutFlag & mask))
    {
        tmp16 |= ENC_CTRL_DIRQ_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionCompareFlag & mask))
    {
        tmp16 |= ENC_CTRL_CMPIRQ_MASK;
    }
    if (0U != tmp16)
    {
        base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
    }

    /* ENC_CTRL2. */
    tmp16 = 0U;
    if (0U != ((uint32_t)kENC_SimultBothPhaseChangeFlag & mask))
    {
        tmp16 |= ENC_CTRL2_SABIRQ_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollOverFlag & mask))
    {
        tmp16 |= ENC_CTRL2_ROIRQ_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollUnderFlag & mask))
    {
        tmp16 |= ENC_CTRL2_RUIRQ_MASK;
    }
    if (0U != tmp16)
    {
        base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
    }
}

/*!
 * brief Enable the interrupts.
 *
 * param base ENC peripheral base address.
 * param mask Mask value of interrupts to be enabled. For available mask, see to "_enc_interrupt_enable".
 */
void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
{
    uint32_t tmp16 = 0U;

    /* ENC_CTRL. */
    if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_HIE_MASK;
    }
    if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_XIE_MASK;
    }
    if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_DIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_CMPIE_MASK;
    }
    if (tmp16 != 0U)
    {
        base->CTRL = (uint16_t)(((uint32_t)base->CTRL & (~ENC_CTRL_W1C_FLAGS)) | tmp16);
    }
    /* ENC_CTRL2. */
    tmp16 = 0U;
    if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_SABIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_ROIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_RUIE_MASK;
    }
    if (tmp16 != 0U)
    {
        base->CTRL2 = (uint16_t)(((uint32_t)base->CTRL2 & (~ENC_CTRL2_W1C_FLAGS)) | tmp16);
    }
}

/*!
 * brief Disable the interrupts.
 *
 * param base ENC peripheral base address.
 * param mask Mask value of interrupts to be disabled. For available mask, see to "_enc_interrupt_enable".
 */
void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
{
    uint16_t tmp16 = 0U;

    /* ENC_CTRL. */
    if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_HIE_MASK;
    }
    if (0U != ((uint32_t)kENC_INDEXPulseInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_XIE_MASK;
    }
    if (0U != ((uint32_t)kENC_WatchdogTimeoutInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_DIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionCompareInerruptEnable & mask))
    {
        tmp16 |= ENC_CTRL_CMPIE_MASK;
    }
    if (0U != tmp16)
    {
        base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
    }
    /* ENC_CTRL2. */
    tmp16 = 0U;
    if (0U != ((uint32_t)kENC_SimultBothPhaseChangeInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_SABIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollOverInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_ROIE_MASK;
    }
    if (0U != ((uint32_t)kENC_PositionRollUnderInterruptEnable & mask))
    {
        tmp16 |= ENC_CTRL2_RUIE_MASK;
    }
    if (tmp16 != 0U)
    {
        base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
    }
}

/*!
 * brief  Get the enabled interrupts' flags.
 *
 * param  base ENC peripheral base address.
 *
 * return      Mask value of enabled interrupts.
 */
uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
{
    uint32_t ret32 = 0U;

    /* ENC_CTRL. */
    if (0U != (ENC_CTRL_HIE_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_HOMETransitionInterruptEnable;
    }
    if (0U != (ENC_CTRL_XIE_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_INDEXPulseInterruptEnable;
    }
    if (0U != (ENC_CTRL_DIE_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_WatchdogTimeoutInterruptEnable;
    }
    if (0U != (ENC_CTRL_CMPIE_MASK & base->CTRL))
    {
        ret32 |= (uint32_t)kENC_PositionCompareInerruptEnable;
    }
    /* ENC_CTRL2. */
    if (0U != (ENC_CTRL2_SABIE_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_SimultBothPhaseChangeInterruptEnable;
    }
    if (0U != (ENC_CTRL2_ROIE_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_PositionRollOverInterruptEnable;
    }
    if (0U != (ENC_CTRL2_RUIE_MASK & base->CTRL2))
    {
        ret32 |= (uint32_t)kENC_PositionRollUnderInterruptEnable;
    }
    return ret32;
}

/*!
 * brief Set initial position value for ENC module.
 *
 * param base ENC peripheral base address
 * param value Positive initial value
 */
void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
{
    base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
    base->LINIT = (uint16_t)(value);        /* Set lower 16 bits. */
}

/*!
 * brief  Get the current position counter's value.
 *
 * param  base ENC peripheral base address.
 *
 * return     Current position counter's value.
 */
uint32_t ENC_GetPositionValue(ENC_Type *base)
{
    uint32_t ret32;

    ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
    ret32 <<= 16U;
    ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */

    return ret32;
}

/*!
 * brief  Get the hold position counter's value.
 *
 * When any of the counter registers is read, the contents of each counter register is written to the corresponding hold
 * register. Taking a snapshot of the counters' values provides a consistent view of a system position and a velocity to
 * be attained.
 *
 * param  base ENC peripheral base address.
 *
 * return      Hold position counter's value.
 */
uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
{
    uint32_t ret32;

    ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
    ret32 <<= 16U;
    ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */

    return ret32;
}