SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: config-file
content: |
  MEMORY {
    RAM_INT_0 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_0_LENGTH:#010x}
    RAM_INT_1 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_1_LENGTH:#010x}
    RAM       : ORIGIN = ${ZYNQMP_RPU_RAM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_ORIGIN:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}
    NOCACHE   : ORIGIN = ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}
  }

  REGION_ALIAS ("REGION_START",          RAM_INT_0);
  REGION_ALIAS ("REGION_VECTOR",         RAM_INT_0);
  REGION_ALIAS ("REGION_TEXT",           RAM);
  REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
  REGION_ALIAS ("REGION_RODATA",         RAM);
  REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
  REGION_ALIAS ("REGION_DATA",           RAM);
  REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
  REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
  REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
  REGION_ALIAS ("REGION_FAST_DATA",      RAM);
  REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
  REGION_ALIAS ("REGION_BSS",            RAM);
  REGION_ALIAS ("REGION_WORK",           RAM);
  REGION_ALIAS ("REGION_STACK",          RAM);
  REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
  REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);

  bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;

  bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;

  bsp_vector_table_in_start_section = 1;

  INCLUDE linkcmds.armv4

  # define symbols needed by the R5 xil_cache.c
  _stack_end = bsp_section_stack_end;
  __undef_stack = bsp_section_stack_begin;
copyrights:
- Copyright (C) 2023 Reflex Aerospace GmbH
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []
target: linkcmds
type: build