/* * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 * 82178 Puchheim * Germany * * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.org/license/LICENSE. */ #define ARM_CP15_TEXT_SECTION BSP_START_TEXT_SECTION #include #include #include #include BSP_START_TEXT_SECTION void bsp_start_hook_0(void) { arm_a9mpcore_start_hook_0(); } BSP_START_TEXT_SECTION void bsp_start_hook_1(void) { arm_a9mpcore_start_hook_1(); bsp_start_copy_sections(); zynq_setup_mmu_and_cache(); #if !defined(RTEMS_SMP) \ && (defined(BSP_DATA_CACHE_ENABLED) \ || defined(BSP_INSTRUCTION_CACHE_ENABLED)) /* Enable unified L2 cache */ rtems_cache_enable_data(); #endif bsp_start_clear_bss(); }