/* * Copyright (c) 2013 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Dornierstr. 4 * 82178 Puchheim * Germany * * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. */ #include #include #ifdef RTEMS_SMP #define MMU_DATA_READ_WRITE ARMV7_MMU_DATA_READ_WRITE_SHAREABLE #else #define MMU_DATA_READ_WRITE ARMV7_MMU_DATA_READ_WRITE_CACHED #endif BSP_START_DATA_SECTION const arm_cp15_start_section_config bsp_mm_config_table[] = { { .begin = (uint32_t) bsp_section_fast_text_begin, .end = (uint32_t) bsp_section_fast_text_end, .flags = ARMV7_MMU_CODE_CACHED }, { .begin = (uint32_t) bsp_section_fast_data_begin, .end = (uint32_t) bsp_section_fast_data_end, .flags = MMU_DATA_READ_WRITE }, { .begin = (uint32_t) bsp_section_start_begin, .end = (uint32_t) bsp_section_start_end, .flags = ARMV7_MMU_CODE_CACHED }, { .begin = (uint32_t) bsp_section_vector_begin, .end = (uint32_t) bsp_section_vector_end, .flags = MMU_DATA_READ_WRITE }, { .begin = (uint32_t) bsp_section_text_begin, .end = (uint32_t) bsp_section_text_end, .flags = ARMV7_MMU_CODE_CACHED }, { .begin = (uint32_t) bsp_section_rodata_begin, .end = (uint32_t) bsp_section_rodata_end, .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED }, { .begin = (uint32_t) bsp_section_data_begin, .end = (uint32_t) bsp_section_data_end, .flags = MMU_DATA_READ_WRITE }, { .begin = (uint32_t) bsp_section_bss_begin, .end = (uint32_t) bsp_section_bss_end, .flags = MMU_DATA_READ_WRITE }, { .begin = (uint32_t) bsp_section_work_begin, .end = (uint32_t) bsp_section_work_end, .flags = MMU_DATA_READ_WRITE }, { .begin = (uint32_t) bsp_section_stack_begin, .end = (uint32_t) bsp_section_stack_end, .flags = MMU_DATA_READ_WRITE } }; BSP_START_DATA_SECTION const size_t bsp_mm_config_table_size = RTEMS_ARRAY_SIZE(&bsp_mm_config_table);