/* SPDX-License-Identifier: BSD-2-Clause */

/*
 * RTEMS generic mcf548x BSP
 *
 * The file contains the linker directives for the generic MCF548x
 * BSP to be used with an m5484FireEngine EVB to load and execute
 * code in the RAM.
 *
 * Parts of the code has been derived from the "dBUG source code"
 * package Freescale is providing for M548X EVBs. The usage of
 * the modified or unmodified code and it's integration into the
 * generic mcf548x BSP has been done according to the Freescale
 * license terms.
 *
 * The Freescale license terms can be reviewed in the file
 *
 *    LICENSE.Freescale
 *
 * The generic mcf548x BSP has been developed on the basic
 * structures and modules of the av5282 BSP.
 */

/*
 * Copyright (c) 2007 embedded brains GmbH & Co. KG
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/* 
 * Location and size of on-chip devices
 */
_SdramBase      = DEFINED(_SdramBase)      ? _SdramBase   : 0x00000000;
_SdramSize      = DEFINED(_SdramSize)      ? _SdramSize   : (64 * 1024*1024);
_SysSramBase    = DEFINED(_SysSramBase)    ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize    = DEFINED(_SysSramSize)    ? _SysSramSize : (32 * 1024);
_McdapiBase     = DEFINED(_McdapiBase)     ? _McdapiBase  : _SysSramBase;                 
_McdapiSize     = DEFINED(_McdapiSize)     ? _McdapiSize  : (12 * 1024);                  
_CoreSramBase0  = DEFINED(_CoreSramBase0)  ? _CoreSramBase0 : 0x20000000;
_CoreSramBase1  = DEFINED(_CoreSramBase1)  ? _CoreSramBase1 : 0x20001000;
_CoreSramSize0  = DEFINED(_CoreSramSize0)  ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1  = DEFINED(_CoreSramSize1)  ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase  = DEFINED(_BootFlashBase)  ? _BootFlashBase : 0xFF800000;
_BootFlashSize  = DEFINED(_BootFlashSize)  ? _BootFlashSize : (2 * 1024*1024);
_CodeFlashBase  = DEFINED(_CodeFlashBase)  ? _CodeFlashBase : 0xE0000000;
_CodeFlashSize  = DEFINED(_CodeFlashSize)  ? _CodeFlashSize : (16 * 1024*1024);

_VBR            = DEFINED(_VBR)            ? _VBR       : _SdramBase;

__MBAR          = DEFINED(__MBAR)          ? __MBAR     : 0x10000000;

MEMORY
{
    sdram      : ORIGIN = 0x00000000, LENGTH = 64M
    code_flash : ORIGIN = 0xE0000000, LENGTH = 16M
    boot_flash : ORIGIN = 0xFF800000, LENGTH = 2M
}

REGION_ALIAS ("REGION_TEXT", sdram);
REGION_ALIAS ("REGION_TEXT_LOAD", sdram);
REGION_ALIAS ("REGION_DATA", sdram);
REGION_ALIAS ("REGION_DATA_LOAD", sdram);

INCLUDE linkcmds.base