/* * This file contains GNU linker directives for a generic MC68360 board. * Variations in memory size and allocation can be made by * overriding some values with linker command-line arguments. * * These linker directives are for producing a bootstrap PROM version. * The data segment is placed at the end of the text segment in the PROM. * The start-up code takes care of copying this region to RAM. * * Saskatchewan Accelerator Laboratory * University of Saskatchewan * Saskatoon, Saskatchewan, CANADA * eric@skatter.usask.ca */ /* * Declare some sizes. * A heap size of 0 means `use all available memory for the heap'. */ RamBase = DEFINED(RamBase) ? RamBase : 0x0; RamSize = DEFINED(RamSize) ? RamSize : 64M; RamEnd = RamBase + RamSize; HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0; /* * Declare on-board memory. */ MEMORY { ram : ORIGIN = 0x00000000, LENGTH = 64M myram : ORIGIN = 16M-400k, LENGTH = 400k rom : ORIGIN = 0x0F000000, LENGTH = 1M dpram : ORIGIN = 0x0E000000, LENGTH = 8k } /* * Load objects */ SECTIONS { /* * Boot PROM */ rom : { _RomBase = .; } >rom /* * Dynamic RAM */ ram : { RamBase = .; } >ram /* * Text, data and bss segments */ .text : AT(0x0) { *(.text*) /* * C++ constructors/destructors */ *(.gnu.linkonce.t.*) /* * Initialization and finalization code. */ PROVIDE (_init = .); *crti.o(.init) *(.init) *crtn.o(.init) PROVIDE (_fini = .); *crti.o(.fini) *(.fini) *crtn.o(.fini) /* * Special FreeBSD sysctl sections. */ . = ALIGN (16); __start_set_sysctl_set = .; *(set_sysctl_*); __stop_set_sysctl_set = ABSOLUTE(.); *(set_domain_*); *(set_pseudo_*); /* * C++ constructors/destructors */ . = ALIGN (16); *crtbegin.o(.ctors) *(.ctors) *crtend.o(.ctors) *crtbegin.o(.dtors) *(.dtors) *crtend.o(.dtors) /* * Exception frame info */ . = ALIGN (16); *(.eh_frame) /* * Read-only data */ . = ALIGN (16); _rodata_start = . ; *(.rodata*) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) . = ALIGN (16); PROVIDE (etext = .); } >rom .tdata : { _TLS_Data_begin = .; *(.tdata .tdata.* .gnu.linkonce.td.*) _TLS_Data_end = .; } >rom .tbss : { _TLS_BSS_begin = .; *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) _TLS_BSS_end = .; } >rom _TLS_Data_size = _TLS_Data_end - _TLS_Data_begin; _TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin; _TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin; _TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin; _TLS_Size = _TLS_BSS_end - _TLS_Data_begin; _TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss)); .data : AT(SIZEOF(.text)) { _copy_start = .; *(.data) KEEP (*(SORT(.rtemsrwset.*))) *(.gnu.linkonce.d*) *(.jcr) *(.gcc_except_table*) . = ALIGN (16); PROVIDE (edata = .); _copy_end = .; } >myram .bss : { M68Kvec = .; . += (256 * 4); _clear_start = .; *(.dynbss) *(.bss* .gnu.linkonce.b.*) *(COMMON) . = ALIGN (16); PROVIDE (end = .); _clear_end = .; } >myram .noinit (NOLOAD) : { *(.noinit*) } >mvram .rtemsstack (NOLOAD) : { *(SORT(.rtemsstack.*)) WorkAreaBase = .; } >myram /* * On-chip memory/peripherals */ dpram : { m360 = .; . += (8 * 1024); } >dpram }