/* * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2010 embedded brains GmbH. * * Copyright (c) 2004 by Jay Monkman * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.org/license/LICENSE. */ #include #include #include #include #include void bsp_interrupt_dispatch(void) { rtems_vector_number vector = AIC_CTL_REG(AIC_IVR); bsp_interrupt_handler_dispatch(vector); AIC_CTL_REG(AIC_EOICR) = 0; } rtems_status_code bsp_interrupt_get_attributes( rtems_vector_number vector, rtems_interrupt_attributes *attributes ) { return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_is_pending( rtems_vector_number vector, bool *pending ) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(pending != NULL); *pending = false; return RTEMS_UNSATISFIED; } rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); return RTEMS_UNSATISFIED; } rtems_status_code bsp_interrupt_clear(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); return RTEMS_UNSATISFIED; } rtems_status_code bsp_interrupt_vector_is_enabled( rtems_vector_number vector, bool *enabled ) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); bsp_interrupt_assert(enabled != NULL); *enabled = false; return RTEMS_UNSATISFIED; } rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); AIC_CTL_REG(AIC_IECR) = 1 << vector; return RTEMS_SUCCESSFUL; } rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) { bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); AIC_CTL_REG(AIC_IDCR) = 1 << vector; return RTEMS_SUCCESSFUL; } void bsp_interrupt_facility_initialize(void) { unsigned long i = 0; for (i = 0; i < 32; ++i) { AIC_SVR_REG(i<<2) = i; } /* disable all interrupts */ AIC_CTL_REG(AIC_IDCR) = 0xffffffff; _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt, NULL); }