From 16fd5a99e1a8c433077e70c1a48e42cc01bf7d29 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 15 Aug 2006 21:02:55 +0000 Subject: 2006-08-15 Kolja Waschk * linkcmds.c, linkcmds.h, memory.c, memory.h, sample.ptf: New files. * bridges.c: corrected detection of bridged connections * clocks.c: removed a printf * linkcmds.[ch] new files, added output of linker script * Makefile.am: added new files * memory.[ch]: new files, detection of memory in SOPC configuration * nios2gen.c: updated command line parsing and output control * output.[ch]: improved output of BSP header file * ptf.[ch]: added ptf_dump_ptf_item and small fixes * sample.ptf: new file, sample configuration for nios2gen * README: updated --- tools/cpu/nios2/sample.ptf | 462 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 462 insertions(+) create mode 100644 tools/cpu/nios2/sample.ptf (limited to 'tools/cpu/nios2/sample.ptf') diff --git a/tools/cpu/nios2/sample.ptf b/tools/cpu/nios2/sample.ptf new file mode 100644 index 0000000000..eb4cf7fea4 --- /dev/null +++ b/tools/cpu/nios2/sample.ptf @@ -0,0 +1,462 @@ +N2GCOMM = "=============== Header output settings ==========================="; + +BSPHEADER +{ + LEADTEXT = +"/* Autogenerated by nios2gen, (C) 2006 K. Waschk rtemsdev/ixo.de */ + +#ifndef __SOPC_H +#define __SOPC_H 1 + +#ifdef __cplusplus +extern "C" { +#endif + +#define CLOCK_FREQ_REF(clock) clock ## _FREQ +#define CLOCK_FREQ(x) CLOCK_FREQ_REF(x) + +"; + + EPILOG = +" +#ifdef __cplusplus +} +#endif +#endif +"; +} + +N2GCOMM = "=============== Class templates =================================="; + +CLASS altera_nios2 +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SYSTEM_BUILDER_INFO + { + Clock_Source = "N2G_CLOCKREF_CLOCK"; + } + SLAVE jtag_debug_module + { + SYSTEM_BUILDER_INFO { Base_Address = "BASE_ADDR"; } + } + WIZARD_SCRIPT_ARGUMENTS + { + cache_has_dcache = "HAS_DCACHE"; + cache_has_icache = "HAS_ICACHE"; + cache_dcache_size = "DCACHE_SIZE"; + cache_icache_size = "ICACHE_SIZE"; + cache_dcache_line_size = "DCACHE_LINE_SIZE"; + cache_icache_line_size = "ICACHE_LINE_SIZE"; + cache_dcache_bursts = "DCACHE_BURSTS"; + cache_icache_burst_type = "ICACHE_BURST_TYPE"; + hardware_multiply_present = "HAS_HWMULT"; + } +} + +CLASS altera_avalon_onchip_memory2 +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + WIZARD_SCRIPT_ARGUMENTS + { + Writeable = "WRITEABLE"; + dual_port = "DUAL_PORT"; + Size_Value = "SIZE_VALUE"; + Size_Multiple = "SIZE_MULTIPLE"; + } + SYSTEM_BUILDER_INFO + { + Clock_Source = "N2G_CLOCKREF_CLOCK"; + } + SLAVE s1 + { + N2G_DEFINE_CONNECTED_PORT = "S1"; + + SYSTEM_BUILDER_INFO + { + Base_Address = "S1_BASE_ADDR"; + Data_Width = "S1_DATA_WIDTH"; + Address_Width = "S1_ADDR_WIDTH"; + Address_Span = "S1_ADDR_SPAN"; + } + } + SLAVE s2 + { + N2G_DEFINE_CONNECTED_PORT = "S2"; + + SYSTEM_BUILDER_INFO + { + Base_Address = "S2_BASE_ADDR"; + Data_Width = "S2_DATA_WIDTH"; + Address_Width = "S2_ADDR_WIDTH"; + Address_Span = "S2_ADDR_SPAN"; + } + } +} + +CLASS sram_256k_x_16_bit +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SLAVE sram + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + Data_Width = "DATA_WIDTH"; + Address_Width = "ADDR_WIDTH"; + Address_Span = "ADDR_SPAN"; + } + } +} + +CLASS altera_avalon_sysid +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SLAVE control_slave + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + } + } + WIZARD_SCRIPT_ARGUMENTS + { + id = "ID"; + timestamp = "TIMESTAMP"; + } +} + +CLASS altera_avalon_timer +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SLAVE s1 + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + IRQ_MASTER { IRQ_Number = "IRQ"; } + } + } + WIZARD_SCRIPT_ARGUMENTS + { + snapshot = "SNAPSHOT"; + always_run = "ALWAYS_RUN"; + mult = "MULT"; + period = "PERIOD"; + period_units = "PERIOD_UNITS"; + fixed_period = "FIXED_PERIOD"; + } + SYSTEM_BUILDER_INFO + { + Clock_Source = "N2G_CLOCKREF_CLOCK"; + } +} + + +CLASS altera_avalon_uart +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SYSTEM_BUILDER_INFO + { + Clock_Source = "N2G_CLOCKREF_CLOCK"; + } + WIZARD_SCRIPT_ARGUMENTS + { + use_cts_rts = "USE_CTS_RTS"; + use_eop_register = "USE_EOP_REG"; + } + SLAVE s1 + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + IRQ_MASTER { IRQ_Number = "IRQ"; } + } + } +} + +CLASS altera_avalon_jtag_uart +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SLAVE avalon_jtag_slave + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + IRQ_MASTER { IRQ_Number = "IRQ"; } + } + } +} + +CLASS altera_avalon_pio +{ + N2G_DEFINE_IS_AVAILABLE = "1"; + + SYSTEM_BUILDER_INFO + { + Clock_Source = "N2G_CLOCKREF_CLOCK"; + } + SLAVE + { + SYSTEM_BUILDER_INFO + { + Base_Address = "BASE_ADDR"; + IRQ_MASTER { IRQ_Number = "IRQ"; } + } + } +} + +N2GCOMM = "=============== Linkcmds output settings ========================="; + +LINKCMDS +{ + LEADTEXT = " +OUTPUT_FORMAT( "elf32-littlenios2", + "elf32-littlenios2", + "elf32-littlenios2" ) +OUTPUT_ARCH( nios2 ) +ENTRY( _start ) +" + + SECTION entry + { + COMMANDS = +" KEEP (*(.entry)) +"; + } + + SECTION exceptions + { + COMMANDS = +" PROVIDE (__ram_exceptions_start = ABSOLUTE(.)); + . = ALIGN(0x20); + *(.irq) + KEEP (*(.exceptions.entry.label)); + KEEP (*(.exceptions.entry.user)); + KEEP (*(.exceptions.entry)); + KEEP (*(.exceptions.irqtest.user)); + KEEP (*(.exceptions.irqtest)); + KEEP (*(.exceptions.irqhandler.user)); + KEEP (*(.exceptions.irqhandler)); + KEEP (*(.exceptions.irqreturn.user)); + KEEP (*(.exceptions.irqreturn)); + KEEP (*(.exceptions.notirq.label)); + KEEP (*(.exceptions.notirq.user)); + KEEP (*(.exceptions.notirq)); + KEEP (*(.exceptions.soft.user)); + KEEP (*(.exceptions.soft)); + KEEP (*(.exceptions.unknown.user)); + KEEP (*(.exceptions.unknown)); + KEEP (*(.exceptions.exit.label)); + KEEP (*(.exceptions.exit.user)); + KEEP (*(.exceptions.exit)); + KEEP (*(.exceptions)); + PROVIDE (__ram_exceptions_end = ABSOLUTE(.)); +"; + } + + SECTION text + { + LOCATION = "SDRAM"; + COMMANDS = +" PROVIDE (stext = ABSOLUTE(.)); + + *(.interp) + *(.hash) + *(.dynsym) + *(.dynstr) + *(.gnu.version) + *(.gnu.version_d) + *(.gnu.version_r) + *(.rel.init) + *(.rela.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rel.fini) + *(.rela.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rela.ctors) + *(.rel.dtors) + *(.rela.dtors) + *(.rel.got) + *(.rela.got) + *(.rel.sdata .rel.sdata.* .rel.gnu.linkonce.s.*) + *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) + *(.rel.sbss .rel.sbss.* .rel.gnu.linkonce.sb.*) + *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) + *(.rel.sdata2 .rel.sdata2.* .rel.gnu.linkonce.s2.*) + *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) + *(.rel.sbss2 .rel.sbss2.* .rel.gnu.linkonce.sb2.*) + *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + *(.rel.plt) + *(.rela.plt) + + KEEP (*(.init)) + *(.plt) + *(.text .stub .text.* .gnu.linkonce.t.*) + + /* Special FreeBSD sysctl sections. */ + . = ALIGN (16); + __start_set_sysctl_set = .; + *(set_sysctl_*); + __stop_set_sysctl_set = ABSOLUTE(.); + *(set_domain_*); + *(set_pseudo_*); + + *(.gnu.warning.*) + KEEP (*(.fini)) + PROVIDE (__etext = ABSOLUTE(.)); + PROVIDE (_etext = ABSOLUTE(.)); + PROVIDE (etext = ABSOLUTE(.)); + + *(.eh_frame_hdr) + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = ABSOLUTE(.)); + *(.preinit_array) + PROVIDE (__preinit_array_end = ABSOLUTE(.)); + PROVIDE (__init_array_start = ABSOLUTE(.)); + *(.init_array) + PROVIDE (__init_array_end = ABSOLUTE(.)); + PROVIDE (__fini_array_start = ABSOLUTE(.)); + *(.fini_array) + PROVIDE (__fini_array_end = ABSOLUTE(.)); + SORT(CONSTRUCTORS) + KEEP (*(.eh_frame)) + *(.gcc_except_table) + *(.dynamic) + PROVIDE (__CTOR_LIST__ = ABSOLUTE(.)); + KEEP (*(.ctors)) + KEEP (*(SORT(.ctors.*))) + PROVIDE (__CTOR_END__ = ABSOLUTE(.)); + PROVIDE (__DTOR_LIST__ = ABSOLUTE(.)); + KEEP (*(.dtors)) + KEEP (*(SORT(.dtors.*))) + PROVIDE (__DTOR_END__ = ABSOLUTE(.)); + KEEP (*(.jcr)) + . = ALIGN(32 / 8); +"; + } + + SECTION rodata + { + LOCATION = "SDRAM"; + COMMANDS = +" PROVIDE (__ram_rodata_start = ABSOLUTE(.)); + . = ALIGN(32 / 8); + *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.rodata1) + . = ALIGN(32 / 8); + PROVIDE (__ram_rodata_end = ABSOLUTE(.)); +"; + } + + SECTION rwdata + { + LOCATION = "SDRAM"; + COMMANDS = +" PROVIDE (__ram_rwdata_start = ABSOLUTE(.)); + . = ALIGN(32 / 8); + *(.got.plt) *(.got) + *(.data1) + *(.data .data.* .gnu.linkonce.d.*) + + _gp = ABSOLUTE(. + 0x8000); + PROVIDE(gp = _gp); + + *(.sdata .sdata.* .gnu.linkonce.s.*) + *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) + + . = ALIGN(32 / 8); + _edata = ABSOLUTE(.); + PROVIDE (edata = ABSOLUTE(.)); + PROVIDE (__ram_rwdata_end = ABSOLUTE(.)); +"; + } + + SECTION bss + { + LOCATION = "SDRAM"; + COMMANDS = +" __bss_start = ABSOLUTE(.); + PROVIDE (__sbss_start = ABSOLUTE(.)); + PROVIDE (___sbss_start = ABSOLUTE(.)); + + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) + *(.scommon) + + PROVIDE (__sbss_end = ABSOLUTE(.)); + PROVIDE (___sbss_end = ABSOLUTE(.)); + + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN(32 / 8); + __bss_end = ABSOLUTE(.); +"; + } + + STABS = +" .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* Altera debug extensions */ + .debug_alt_sim_info 0 : { *(.debug_alt_sim_info) } +"; + + HEAP = "SDRAM"; + STACK = "SDRAM"; +} + -- cgit v1.2.3