From 038faca16018945b65249e0e3c332effb5dec82b Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Tue, 25 Nov 2014 16:47:20 +0100
Subject: rtems: Add rtems_cache_coherent_allocate()

Add rtems_cache_coherent_free() and rtems_cache_coherent_add_area().
---
 testsuites/sptests/spcache01/init.c        | 47 ++++++++++++++++++++++++++++++
 testsuites/sptests/spcache01/spcache01.doc |  3 ++
 testsuites/sptests/spcache01/spcache01.scn |  1 +
 3 files changed, 51 insertions(+)

(limited to 'testsuites')

diff --git a/testsuites/sptests/spcache01/init.c b/testsuites/sptests/spcache01/init.c
index 95777e1a28..8ed3dbeaeb 100644
--- a/testsuites/sptests/spcache01/init.c
+++ b/testsuites/sptests/spcache01/init.c
@@ -22,6 +22,7 @@
 
 #include <rtems.h>
 #include <rtems/counter.h>
+#include <rtems/score/sysstate.h>
 
 #define TESTS_USE_PRINTF
 #include "tmacros.h"
@@ -409,6 +410,51 @@ static void test_cache_aligned_alloc(void)
   free(p1);
 }
 
+#define AREA_SIZE 256
+
+static char cache_coherent_area_0[AREA_SIZE];
+
+static char cache_coherent_area_1[AREA_SIZE];
+
+static char cache_coherent_area_2[AREA_SIZE];
+
+static void add_area(void *begin)
+{
+  rtems_cache_coherent_add_area(NULL, 0);
+  rtems_cache_coherent_add_area(begin, AREA_SIZE);
+}
+
+static void test_cache_coherent_alloc(void)
+{
+  void *p0;
+  void *p1;
+  System_state_Codes previous_state;
+
+  printf("test cache coherent allocation\n");
+
+  p0 = rtems_cache_coherent_allocate(1, 0, 0);
+  rtems_test_assert(p0 != NULL);
+
+  rtems_cache_coherent_free(p0);
+
+  p0 = rtems_cache_coherent_allocate(1, 0, 0);
+  rtems_test_assert(p0 != NULL);
+
+  add_area(&cache_coherent_area_0[0]);
+  add_area(&cache_coherent_area_1[0]);
+
+  previous_state = _System_state_Get();
+  _System_state_Set(previous_state + 1);
+  add_area(&cache_coherent_area_2[0]);
+  _System_state_Set(previous_state);
+
+  p1 = rtems_cache_coherent_allocate(1, 0, 0);
+  rtems_test_assert(p1 != NULL);
+
+  rtems_cache_coherent_free(p0);
+  rtems_cache_coherent_free(p1);
+}
+
 static void Init(rtems_task_argument arg)
 {
   TEST_BEGIN();
@@ -416,6 +462,7 @@ static void Init(rtems_task_argument arg)
   test_data_flush_and_invalidate();
   test_timing();
   test_cache_aligned_alloc();
+  test_cache_coherent_alloc();
 
   TEST_END();
 
diff --git a/testsuites/sptests/spcache01/spcache01.doc b/testsuites/sptests/spcache01/spcache01.doc
index 04e32a1e5d..9c33d94e7d 100644
--- a/testsuites/sptests/spcache01/spcache01.doc
+++ b/testsuites/sptests/spcache01/spcache01.doc
@@ -14,6 +14,9 @@ directives:
   - rtems_cache_invalidate_multiple_data_lines()
   - rtems_cache_invalidate_multiple_instruction_lines()
   - rtems_cache_aligned_malloc()
+  - rtems_cache_coherent_allocate()
+  - rtems_cache_coherent_free()
+  - rtems_cache_coherent_add_area()
 
 concepts:
 
diff --git a/testsuites/sptests/spcache01/spcache01.scn b/testsuites/sptests/spcache01/spcache01.scn
index 4e7d53a9f6..6f1d2a6835 100644
--- a/testsuites/sptests/spcache01/spcache01.scn
+++ b/testsuites/sptests/spcache01/spcache01.scn
@@ -43,4 +43,5 @@ invalidate multiple instruction
   duration with warm cache 640 ns
   duration with invalidated cache 2600 ns
 test rtems_cache_aligned_malloc()
+test cache coherent allocation
 *** END OF TEST SPCACHE 1 ***
-- 
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