From 97fce5120c08180a86301b03e61d0a06db5f8b9b Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Thu, 13 Oct 2022 06:23:30 +0200
Subject: build: Enable RISCV_BOOT_HARTID only for riscv

---
 spec/build/cpukit/optboothartid.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'spec/build/cpukit/optboothartid.yml')

diff --git a/spec/build/cpukit/optboothartid.yml b/spec/build/cpukit/optboothartid.yml
index ede4e5ead8..f6cf6da6d4 100644
--- a/spec/build/cpukit/optboothartid.yml
+++ b/spec/build/cpukit/optboothartid.yml
@@ -12,7 +12,7 @@ default-by-variant:
   - riscv/mpfs64.*
 description: |
   boot hartid (processor number) of risc-v cpu (default 0)
-enabled-by: true
+enabled-by: riscv
 format: '{}'
 links: []
 name: RISCV_BOOT_HARTID
-- 
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