From 7792ab88ca300b167a6b64f48afc039da88f4d93 Mon Sep 17 00:00:00 2001 From: Stephen Clark Date: Mon, 23 Aug 2021 12:58:47 -0500 Subject: bsps/zynqmp: Added I2C support for ZynqMP Added I2C drivers for ZynqMP and updated build system accordingly. --- spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 4 +++ .../build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml | 2 ++ .../bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml | 19 +++++++++++++ .../bsps/aarch64/xilinx-zynqmp/optclki2c0.yml | 31 ++++++++++++++++++++++ .../bsps/aarch64/xilinx-zynqmp/optclki2c1.yml | 31 ++++++++++++++++++++++ 5 files changed, 87 insertions(+) create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml (limited to 'spec/build/bsps/aarch64/xilinx-zynqmp') diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml index 03ccdbbc8b..1a356903cd 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml @@ -27,6 +27,10 @@ links: uid: optramlen - role: build-dependency uid: optramori +- role: build-dependency + uid: optclki2c0 +- role: build-dependency + uid: optclki2c1 - role: build-dependency uid: optclkuart - role: build-dependency diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml index fa6347b2e4..4727ebddf7 100644 --- a/spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml @@ -11,6 +11,8 @@ links: uid: grp - role: build-dependency uid: tstzu3eg +- role : build-dependency + uid: objcadencei2c type: build use-after: [] use-before: [] diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml new file mode 100644 index 0000000000..fd9d51dfa9 --- /dev/null +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/objcadencei2c.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2021 On-Line Applications Research (OAR) +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/include/dev/i2c/cadence-i2c-regs.h + - bsps/include/dev/i2c/cadence-i2c.h + - bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h +links: [] +source: +- bsps/shared/dev/i2c/cadence-i2c.c +type: build diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml new file mode 100644 index 0000000000..f44382c6b2 --- /dev/null +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml @@ -0,0 +1,31 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: | + Copyright (C) 2021 On-Line Applications Research (OAR) + Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 111111111 +default-by-family: [] +default-by-variant: +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_ilp32_qemu.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_ilp32_zu3eg.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_lp64_qemu.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_lp64_zu3eg.* +description: | + ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal + has been processed using the values passed to the I2C0_REF_CTRL register. +enabled-by: true +format: '{}' +links: [] +name: ZYNQMP_CLOCK_I2C0 +type: build diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml new file mode 100644 index 0000000000..0431a7fac7 --- /dev/null +++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml @@ -0,0 +1,31 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: | + Copyright (C) 2021 On-Line Applications Research (OAR) + Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 111111111 +default-by-family: [] +default-by-variant: +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_ilp32_qemu.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_ilp32_zu3eg.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_lp64_qemu.* +- value: 111111111 + variants: + - aarch64/xilinx_zynqmp_lp64_zu3eg.* +description: | + ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal + has been processed using the values passed to the I2C1_REF_CTRL register. +enabled-by: true +format: '{}' +links: [] +name: ZYNQMP_CLOCK_I2C1 +type: build -- cgit v1.2.3