From 3ebc6dce93910721c9cec2cea95651a6f060a28d Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Fri, 24 Jan 2003 11:24:58 +0000 Subject: 2003-01-24 Ralf Corsepius * Makefile.am: Put GENERATED_FILES into $builddir. --- doc/supplements/arm/ChangeLog | 4 ++++ doc/supplements/arm/Makefile.am | 20 ++++++++++---------- doc/supplements/hppa1_1/ChangeLog | 4 ++++ doc/supplements/hppa1_1/Makefile.am | 20 ++++++++++---------- doc/supplements/i386/ChangeLog | 4 ++++ doc/supplements/i386/Makefile.am | 20 ++++++++++---------- doc/supplements/i960/ChangeLog | 4 ++++ doc/supplements/i960/Makefile.am | 20 ++++++++++---------- doc/supplements/m68k/ChangeLog | 4 ++++ doc/supplements/m68k/Makefile.am | 20 ++++++++++---------- doc/supplements/mips/ChangeLog | 4 ++++ doc/supplements/mips/Makefile.am | 20 ++++++++++---------- doc/supplements/mips64orion/ChangeLog | 4 ++++ doc/supplements/mips64orion/Makefile.am | 20 ++++++++++---------- doc/supplements/powerpc/ChangeLog | 4 ++++ doc/supplements/powerpc/Makefile.am | 22 +++++++++++----------- doc/supplements/sh/ChangeLog | 4 ++++ doc/supplements/sh/Makefile.am | 20 ++++++++++---------- doc/supplements/sparc/ChangeLog | 4 ++++ doc/supplements/sparc/Makefile.am | 20 ++++++++++---------- doc/supplements/template/ChangeLog | 4 ++++ doc/supplements/template/Makefile.am | 20 ++++++++++---------- 22 files changed, 155 insertions(+), 111 deletions(-) (limited to 'doc/supplements') diff --git a/doc/supplements/arm/ChangeLog b/doc/supplements/arm/ChangeLog index 7137c8dd8b..644db501ed 100644 --- a/doc/supplements/arm/ChangeLog +++ b/doc/supplements/arm/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/arm/Makefile.am b/doc/supplements/arm/Makefile.am index ba10564e53..c90a569d72 100644 --- a/doc/supplements/arm/Makefile.am +++ b/doc/supplements/arm/Makefile.am @@ -28,17 +28,17 @@ arm_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Floating Point Unit" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -46,23 +46,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t BSP_TIMES +intr.texi: intr_NOTIMES.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -72,7 +72,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -83,7 +83,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "MYBSP Timing Data" < $< > $@ @@ -93,7 +93,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t +timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t cat $(srcdir)/timeBSP.t $(top_srcdir)/common/timetbl.t >timeBSP_.t @echo >>timeBSP_.t @echo "@tex" >>timeBSP_.t diff --git a/doc/supplements/hppa1_1/ChangeLog b/doc/supplements/hppa1_1/ChangeLog index a96c5fb663..78b30307fe 100644 --- a/doc/supplements/hppa1_1/ChangeLog +++ b/doc/supplements/hppa1_1/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/hppa1_1/Makefile.am b/doc/supplements/hppa1_1/Makefile.am index 85c94a0aed..e2f87d5de5 100644 --- a/doc/supplements/hppa1_1/Makefile.am +++ b/doc/supplements/hppa1_1/Makefile.am @@ -29,17 +29,17 @@ hppa1_1_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features CPU Model Name" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t SIMHPPA_TIMES +intr.texi: intr_NOTIMES.t SIMHPPA_TIMES ${REPLACE2} -p $(srcdir)/SIMHPPA_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Disabling of Interrupts by RTEMS" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t SIMHPPA_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t SIMHPPA_TIMES ${REPLACE2} -p $(srcdir)/SIMHPPA_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t SIMHPPA_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "HP-7100 Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeSIMHPPA.texi: timeSIMHPPA.t +timeSIMHPPA.texi: timeSIMHPPA.t $(BMENU2) -p "Timing Specification Terminology" \ -u "Top" \ -n "Command and Variable Index" < $< > $@ diff --git a/doc/supplements/i386/ChangeLog b/doc/supplements/i386/ChangeLog index a96c5fb663..78b30307fe 100644 --- a/doc/supplements/i386/ChangeLog +++ b/doc/supplements/i386/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/i386/Makefile.am b/doc/supplements/i386/Makefile.am index 1332c39d27..e9b0e77c14 100644 --- a/doc/supplements/i386/Makefile.am +++ b/doc/supplements/i386/Makefile.am @@ -29,17 +29,17 @@ i386_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Floating Point Unit" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -48,23 +48,23 @@ $(srcdir)/memmodel.texi: memmodel.t # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t FORCE386_TIMES +intr.texi: intr_NOTIMES.t FORCE386_TIMES ${REPLACE2} -p $(srcdir)/FORCE386_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -74,7 +74,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t FORCE386_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t FORCE386_TIMES ${REPLACE2} -p $(srcdir)/FORCE386_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t FORCE386_TIMES # Timing Specification Chapter: # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "CPU386 Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeFORCE386.texi: $(top_srcdir)/common/timetbl.t timeFORCE386.t +timeFORCE386.texi: $(top_srcdir)/common/timetbl.t timeFORCE386.t cat $(srcdir)/timeFORCE386.t $(top_srcdir)/common/timetbl.t >timeFORCE386_.t @echo >>timeFORCE386_.t @echo "@tex" >>timeFORCE386_.t diff --git a/doc/supplements/i960/ChangeLog b/doc/supplements/i960/ChangeLog index f908d15c61..ca1439ed36 100644 --- a/doc/supplements/i960/ChangeLog +++ b/doc/supplements/i960/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/i960/Makefile.am b/doc/supplements/i960/Makefile.am index c29a384e3c..fc6859166e 100644 --- a/doc/supplements/i960/Makefile.am +++ b/doc/supplements/i960/Makefile.am @@ -28,17 +28,17 @@ i960_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Floating Point Unit" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions Leaf Procedures" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -46,23 +46,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t CVME961_TIMES +intr.texi: intr_NOTIMES.t CVME961_TIMES ${REPLACE2} -p $(srcdir)/CVME961_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -72,7 +72,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t CVME961_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t CVME961_TIMES ${REPLACE2} -p $(srcdir)/CVME961_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -83,7 +83,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t CVME961_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "CVME961 Timing Data" < $< > $@ @@ -93,7 +93,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeCVME961.texi: $(top_srcdir)/common/timetbl.t timeCVME961.t +timeCVME961.texi: $(top_srcdir)/common/timetbl.t timeCVME961.t cat $(srcdir)/timeCVME961.t $(top_srcdir)/common/timetbl.t >timeCVME961_.t @echo >>timeCVME961_.t @echo "@tex" >>timeCVME961_.t diff --git a/doc/supplements/m68k/ChangeLog b/doc/supplements/m68k/ChangeLog index 2d2ccce9d0..40418dff77 100644 --- a/doc/supplements/m68k/ChangeLog +++ b/doc/supplements/m68k/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/m68k/Makefile.am b/doc/supplements/m68k/Makefile.am index 1e75423686..e4ac248b34 100644 --- a/doc/supplements/m68k/Makefile.am +++ b/doc/supplements/m68k/Makefile.am @@ -29,17 +29,17 @@ m68k_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Extend Byte to Long Instruction" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t MVME136_TIMES +intr.texi: intr_NOTIMES.t MVME136_TIMES ${REPLACE2} -p $(srcdir)/MVME136_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t MVME136_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t MVME136_TIMES ${REPLACE2} -p $(srcdir)/MVME136_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t MVME136_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "MVME136 Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeMVME136.texi: $(top_srcdir)/common/timetbl.t timeMVME136.t +timeMVME136.texi: $(top_srcdir)/common/timetbl.t timeMVME136.t cat $(srcdir)/timeMVME136.t $(top_srcdir)/common/timetbl.t >timeMVME136_.t @echo >>timeMVME136_.t @echo "@tex" >>timeMVME136_.t diff --git a/doc/supplements/mips/ChangeLog b/doc/supplements/mips/ChangeLog index ccbd4cfc72..e78ed1afce 100644 --- a/doc/supplements/mips/ChangeLog +++ b/doc/supplements/mips/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/mips/Makefile.am b/doc/supplements/mips/Makefile.am index 6838533b87..a30d214d8a 100644 --- a/doc/supplements/mips/Makefile.am +++ b/doc/supplements/mips/Makefile.am @@ -29,17 +29,17 @@ mips_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Another Optional Feature" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t BSP_TIMES +intr.texi: intr_NOTIMES.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "BSP_FOR_TIMES Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t +timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t cat $(srcdir)/timeBSP.t $(top_srcdir)/common/timetbl.t >timeBSP_.t @echo >>timeBSP_.t @echo "@tex" >>timeBSP_.t diff --git a/doc/supplements/mips64orion/ChangeLog b/doc/supplements/mips64orion/ChangeLog index a8438cf53a..e3e2d3dfb0 100644 --- a/doc/supplements/mips64orion/ChangeLog +++ b/doc/supplements/mips64orion/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/mips64orion/Makefile.am b/doc/supplements/mips64orion/Makefile.am index 39f01a8e2d..96394f8f66 100644 --- a/doc/supplements/mips64orion/Makefile.am +++ b/doc/supplements/mips64orion/Makefile.am @@ -29,17 +29,17 @@ mips64orion_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Another Optional Feature" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t BSP_TIMES +intr.texi: intr_NOTIMES.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "BSP_FOR_TIMES Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t +timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t cat $(srcdir)/timeBSP.t $(top_srcdir)/common/timetbl.t >timeBSP_.t @echo >>timeBSP_.t @echo "@tex" >>timeBSP_.t diff --git a/doc/supplements/powerpc/ChangeLog b/doc/supplements/powerpc/ChangeLog index a96c5fb663..78b30307fe 100644 --- a/doc/supplements/powerpc/ChangeLog +++ b/doc/supplements/powerpc/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/powerpc/Makefile.am b/doc/supplements/powerpc/Makefile.am index 62c029d7a4..9184893c93 100644 --- a/doc/supplements/powerpc/Makefile.am +++ b/doc/supplements/powerpc/Makefile.am @@ -28,17 +28,17 @@ powerpc_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Low Power Model" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -46,23 +46,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t PSIM_TIMES +intr.texi: intr_NOTIMES.t PSIM_TIMES ${REPLACE2} -p $(srcdir)/PSIM_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -72,7 +72,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t PSIM_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t PSIM_TIMES ${REPLACE2} -p $(srcdir)/PSIM_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -82,7 +82,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t PSIM_TIMES # Timing Specification Chapter: # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "PSIM Timing Data" < $< > $@ @@ -92,7 +92,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timePSIM.texi: $(top_srcdir)/common/timetbl.t timePSIM.t +timePSIM.texi: $(top_srcdir)/common/timetbl.t timePSIM.t cat $(srcdir)/timePSIM.t $(top_srcdir)/common/timetbl.t >timePSIM_.t @echo >>timePSIM_.t @echo "@tex" >>timePSIM_.t @@ -109,7 +109,7 @@ CLEANFILES += timePSIM_.t timeDMV177_.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeDMV177.texi: $(top_srcdir)/common/timetbl.t timeDMV177.t +timeDMV177.texi: $(top_srcdir)/common/timetbl.t timeDMV177.t cat $(srcdir)/timeDMV177.t $(top_srcdir)/common/timetbl.t >timeDMV177_.t @echo >>timeDMV177_.t @echo "@tex" >>timeDMV177_.t diff --git a/doc/supplements/sh/ChangeLog b/doc/supplements/sh/ChangeLog index a8438cf53a..e3e2d3dfb0 100644 --- a/doc/supplements/sh/ChangeLog +++ b/doc/supplements/sh/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/sh/Makefile.am b/doc/supplements/sh/Makefile.am index ce98f93e92..f0c588f597 100644 --- a/doc/supplements/sh/Makefile.am +++ b/doc/supplements/sh/Makefile.am @@ -29,17 +29,17 @@ sh_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Another Optional Feature" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t BSP_TIMES +intr.texi: intr_NOTIMES.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -84,7 +84,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "BSP_FOR_TIMES Timing Data" < $< > $@ @@ -94,7 +94,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t +timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t cat $(srcdir)/timeBSP.t $(top_srcdir)/common/timetbl.t >timeBSP_.t @echo >>timeBSP_.t @echo "@tex" >>timeBSP_.t diff --git a/doc/supplements/sparc/ChangeLog b/doc/supplements/sparc/ChangeLog index a96c5fb663..78b30307fe 100644 --- a/doc/supplements/sparc/ChangeLog +++ b/doc/supplements/sparc/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/sparc/Makefile.am b/doc/supplements/sparc/Makefile.am index 963be59334..374610472a 100644 --- a/doc/supplements/sparc/Makefile.am +++ b/doc/supplements/sparc/Makefile.am @@ -29,17 +29,17 @@ sparc_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features CPU Model Implementation Notes" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -47,23 +47,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t ERC32_TIMES +intr.texi: intr_NOTIMES.t ERC32_TIMES ${REPLACE2} -p $(srcdir)/ERC32_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -73,7 +73,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t ERC32_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t ERC32_TIMES ${REPLACE2} -p $(srcdir)/ERC32_TIMES $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ -u "Top" \ @@ -82,7 +82,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t ERC32_TIMES # Timing Specification Chapter: # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "ERC32 Timing Data" < $< > $@ @@ -92,7 +92,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeERC32.texi: $(top_srcdir)/common/timetbl.t timeERC32.t +timeERC32.texi: $(top_srcdir)/common/timetbl.t timeERC32.t cat $(srcdir)/timeERC32.t $(top_srcdir)/common/timetbl.t >timeERC32_.t @echo >>timeERC32_.t @echo "@tex" >>timeERC32_.t diff --git a/doc/supplements/template/ChangeLog b/doc/supplements/template/ChangeLog index a8438cf53a..e3e2d3dfb0 100644 --- a/doc/supplements/template/ChangeLog +++ b/doc/supplements/template/ChangeLog @@ -1,3 +1,7 @@ +2003-01-24 Ralf Corsepius + + * Makefile.am: Put GENERATED_FILES into $builddir. + 2003-01-22 Ralf Corsepius * version.texi: Remove from CVS. diff --git a/doc/supplements/template/Makefile.am b/doc/supplements/template/Makefile.am index 45334da07f..d9b622890d 100644 --- a/doc/supplements/template/Makefile.am +++ b/doc/supplements/template/Makefile.am @@ -28,17 +28,17 @@ template_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES) # Chapters which get automatic processing # -$(srcdir)/cpumodel.texi: cpumodel.t +cpumodel.texi: cpumodel.t $(BMENU2) -p "Preface" \ -u "Top" \ -n "Calling Conventions" < $< > $@ -$(srcdir)/callconv.texi: callconv.t +callconv.texi: callconv.t $(BMENU2) -p "CPU Model Dependent Features Another Optional Feature" \ -u "Top" \ -n "Memory Model" < $< > $@ -$(srcdir)/memmodel.texi: memmodel.t +memmodel.texi: memmodel.t $(BMENU2) -p "Calling Conventions User-Provided Routines" \ -u "Top" \ -n "Interrupt Processing" < $< > $@ @@ -46,23 +46,23 @@ $(srcdir)/memmodel.texi: memmodel.t # Interrupt Chapter: # 1. Replace Times and Sizes # 2. Build Node Structure -$(srcdir)/intr.texi: intr_NOTIMES.t BSP_TIMES +intr.texi: intr_NOTIMES.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES $(srcdir)/intr_NOTIMES.t | \ $(BMENU2) -p "Memory Model Flat Memory Model" \ -u "Top" \ -n "Default Fatal Error Processing" > $@ -$(srcdir)/fatalerr.texi: fatalerr.t +fatalerr.texi: fatalerr.t $(BMENU2) -p "Interrupt Processing Interrupt Stack" \ -u "Top" \ -n "Board Support Packages" < $< > $@ -$(srcdir)/bsp.texi: bsp.t +bsp.texi: bsp.t $(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \ -u "Top" \ -n "Processor Dependent Information Table" < $< > $@ -$(srcdir)/cputable.texi: cputable.t +cputable.texi: cputable.t $(BMENU2) -p "Board Support Packages Processor Initialization" \ -u "Top" \ -n "Memory Requirements" < $< > $@ @@ -72,7 +72,7 @@ $(srcdir)/cputable.texi: cputable.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES +wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES ${REPLACE2} -p $(srcdir)/BSP_TIMES \ $(top_srcdir)/common/wksheets.t | \ $(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \ @@ -83,7 +83,7 @@ $(srcdir)/wksheets.texi: $(top_srcdir)/common/wksheets.t BSP_TIMES # 1. Copy the Shared File # 3. Build Node Structure -$(srcdir)/timing.texi: $(top_srcdir)/common/timing.t +timing.texi: $(top_srcdir)/common/timing.t $(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \ -u "Top" \ -n "MYBSP Timing Data" < $< > $@ @@ -93,7 +93,7 @@ $(srcdir)/timing.texi: $(top_srcdir)/common/timing.t # 2. Replace Times and Sizes # 3. Build Node Structure -$(srcdir)/timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t +timeBSP.texi: $(top_srcdir)/common/timetbl.t timeBSP.t cat $(srcdir)/timeBSP.t $(top_srcdir)/common/timetbl.t >timeBSP_.t @echo >>timeBSP_.t @echo "@tex" >>timeBSP_.t -- cgit v1.2.3