From 891d63bdddbd0539f031dd680ef62b3e5249b6b7 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 14 Feb 2002 22:14:59 +0000 Subject: 2002-02-04 Joel Sherrill * bsp.t, BSP_TIMES, callconv.t, ChangeLog, cpumodel.t, cputable.t, fatalerr.t, intr_NOTIMES.t, Makefile.am, memmodel.t, mips.texi, preface.texi, stamp-vti, timeBSP.t, version.texi: New files. --- doc/supplements/mips/cpumodel.t | 68 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 doc/supplements/mips/cpumodel.t (limited to 'doc/supplements/mips/cpumodel.t') diff --git a/doc/supplements/mips/cpumodel.t b/doc/supplements/mips/cpumodel.t new file mode 100644 index 0000000000..6acb735530 --- /dev/null +++ b/doc/supplements/mips/cpumodel.t @@ -0,0 +1,68 @@ +@c +@c COPYRIGHT (c) 1988-2002. +@c On-Line Applications Research Corporation (OAR). +@c All rights reserved. +@c +@c $Id$ +@c + +@chapter CPU Model Dependent Features + +@section Introduction + +Microprocessors are generally classified into +families with a variety of CPU models or implementations within +that family. Within a processor family, there is a high level +of binary compatibility. This family may be based on either an +architectural specification or on maintaining compatibility with +a popular processor. Recent microprocessor families such as the +SPARC or PA-RISC are based on an architectural specification +which is independent or any particular CPU model or +implementation. Older families such as the M68xxx and the iX86 +evolved as the manufacturer strived to produce higher +performance processor models which maintained binary +compatibility with older models. + +RTEMS takes advantage of the similarity of the +various models within a CPU family. Although the models do vary +in significant ways, the high level of compatibility makes it +possible to share the bulk of the CPU dependent executive code +across the entire family. Each processor family supported by +RTEMS has a list of features which vary between CPU models +within a family. For example, the most common model dependent +feature regardless of CPU family is the presence or absence of a +floating point unit or coprocessor. When defining the list of +features present on a particular CPU model, one simply notes +that floating point hardware is or is not present and defines a +single constant appropriately. Conditional compilation is +utilized to include the appropriate source code for this CPU +model's feature set. It is important to note that this means +that RTEMS is thus compiled using the appropriate feature set +and compilation flags optimal for this CPU model used. The +alternative would be to generate a binary which would execute on +all family members using only the features which were always +present. + +This chapter presents the set of features which vary +across SPARC implementations and are of importance to RTEMS. +The set of CPU model feature macros are defined in the file +c/src/exec/score/cpu/XXX/XXX.h based upon the particular CPU +model defined on the compilation command line. + +@section CPU Model Name + +The macro CPU_MODEL_NAME is a string which designates +the name of this CPU model. For example, for the MODEL +processor, this macro is set to the string "XXX". + +@section Floating Point Unit + +The macro XXX_HAS_FPU is set to 1 to indicate that +this CPU model has a hardware floating point unit and 0 +otherwise. It does not matter whether the hardware floating +point support is incorporated on-chip or is an external +coprocessor. + +@section Another Optional Feature + +The macro XXX -- cgit v1.2.3