From 6ddf0543b42041ffec9e3731bcb834ba46484a5b Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 13 Aug 1998 21:24:50 +0000 Subject: Switched from presenting timing data based on CPU models to presenting it based on board model. --- doc/supplements/i386/FORCE386_TIMES | 1 + doc/supplements/i386/Makefile | 2 +- doc/supplements/i386/i386.texi | 4 ++-- doc/supplements/i386/timeFORCE386.t | 48 ++++++++++++++++++------------------- doc/supplements/i386/timedata.t | 48 ++++++++++++++++++------------------- 5 files changed, 52 insertions(+), 51 deletions(-) (limited to 'doc/supplements/i386') diff --git a/doc/supplements/i386/FORCE386_TIMES b/doc/supplements/i386/FORCE386_TIMES index 2f699ad7bd..b40f8ad50b 100644 --- a/doc/supplements/i386/FORCE386_TIMES +++ b/doc/supplements/i386/FORCE386_TIMES @@ -7,6 +7,7 @@ # # CPU Model Information # +RTEMS_BSP CPU386 RTEMS_CPU_MODEL i386 # # Interrupt Latency diff --git a/doc/supplements/i386/Makefile b/doc/supplements/i386/Makefile index c1d6b0bd8e..780addb9ff 100644 --- a/doc/supplements/i386/Makefile +++ b/doc/supplements/i386/Makefile @@ -61,7 +61,7 @@ timedata.texi: timedata.t FORCE386_TIMES wksheets.t: ../../common/wksheets.t sed -e 's/WORKSHEETS_PREVIOUS_LINK/Processor Dependent Information Table CPU Dependent Information Table/' \ - -e 's/WORKSHEETS_NEXT_LINK/i386 Timing Data/' \ + -e 's/WORKSHEETS_NEXT_LINK/CPU386 Timing Data/' \ <../../common/wksheets.t >wksheets.t wksheets.texi: wksheets.t FORCE386_TIMES diff --git a/doc/supplements/i386/i386.texi b/doc/supplements/i386/i386.texi index bed6e82c88..1e9ff54b7c 100644 --- a/doc/supplements/i386/i386.texi +++ b/doc/supplements/i386/i386.texi @@ -91,7 +91,7 @@ Applications Supplement. * Processor Dependent Information Table:: * Memory Requirements:: * Timing Specification:: -* i386 Timing Data:: +* CPU386 Timing Data:: * Command and Variable Index:: * Concept Index:: @end menu @@ -102,7 +102,7 @@ Applications Supplement. @c Need to copy the emacs stuff and "trailer stuff" (index, toc) into here @c -@node Command and Variable Index, Concept Index, i386 Timing Data Rate Monotonic Manager, Top +@node Command and Variable Index, Concept Index, CPU386 Timing Data Rate Monotonic Manager, Top @unnumbered Command and Variable Index There are currently no Command and Variable Index entries. diff --git a/doc/supplements/i386/timeFORCE386.t b/doc/supplements/i386/timeFORCE386.t index a13dffb476..0d1fd6c5dd 100644 --- a/doc/supplements/i386/timeFORCE386.t +++ b/doc/supplements/i386/timeFORCE386.t @@ -12,34 +12,34 @@ @end tex @ifinfo -@node i386 Timing Data, i386 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top +@node CPU386 Timing Data, CPU386 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top @end ifinfo -@chapter i386 Timing Data +@chapter CPU386 Timing Data @ifinfo @menu -* i386 Timing Data Introduction:: -* i386 Timing Data Hardware Platform:: -* i386 Timing Data Interrupt Latency:: -* i386 Timing Data Context Switch:: -* i386 Timing Data Directive Times:: -* i386 Timing Data Task Manager:: -* i386 Timing Data Interrupt Manager:: -* i386 Timing Data Clock Manager:: -* i386 Timing Data Timer Manager:: -* i386 Timing Data Semaphore Manager:: -* i386 Timing Data Message Manager:: -* i386 Timing Data Event Manager:: -* i386 Timing Data Signal Manager:: -* i386 Timing Data Partition Manager:: -* i386 Timing Data Region Manager:: -* i386 Timing Data Dual-Ported Memory Manager:: -* i386 Timing Data I/O Manager:: -* i386 Timing Data Rate Monotonic Manager:: +* CPU386 Timing Data Introduction:: +* CPU386 Timing Data Hardware Platform:: +* CPU386 Timing Data Interrupt Latency:: +* CPU386 Timing Data Context Switch:: +* CPU386 Timing Data Directive Times:: +* CPU386 Timing Data Task Manager:: +* CPU386 Timing Data Interrupt Manager:: +* CPU386 Timing Data Clock Manager:: +* CPU386 Timing Data Timer Manager:: +* CPU386 Timing Data Semaphore Manager:: +* CPU386 Timing Data Message Manager:: +* CPU386 Timing Data Event Manager:: +* CPU386 Timing Data Signal Manager:: +* CPU386 Timing Data Partition Manager:: +* CPU386 Timing Data Region Manager:: +* CPU386 Timing Data Dual-Ported Memory Manager:: +* CPU386 Timing Data I/O Manager:: +* CPU386 Timing Data Rate Monotonic Manager:: @end menu @end ifinfo @ifinfo -@node i386 Timing Data Introduction, i386 Timing Data Hardware Platform, i386 Timing Data, i386 Timing Data +@node CPU386 Timing Data Introduction, CPU386 Timing Data Hardware Platform, CPU386 Timing Data, CPU386 Timing Data @end ifinfo @section Introduction @@ -52,7 +52,7 @@ is a description of the interrupt latency and the context switch times as they pertain to the i386 version of RTEMS. @ifinfo -@node i386 Timing Data Hardware Platform, i386 Timing Data Interrupt Latency, i386 Timing Data Introduction, i386 Timing Data +@node CPU386 Timing Data Hardware Platform, CPU386 Timing Data Interrupt Latency, CPU386 Timing Data Introduction, CPU386 Timing Data @end ifinfo @section Hardware Platform @@ -74,7 +74,7 @@ instructions to disable and enable interrupts, was divided by 16 to simulate a i386 executing at 16 Mhz. @ifinfo -@node i386 Timing Data Interrupt Latency, i386 Timing Data Context Switch, i386 Timing Data Hardware Platform, i386 Timing Data +@node CPU386 Timing Data Interrupt Latency, CPU386 Timing Data Context Switch, CPU386 Timing Data Hardware Platform, CPU386 Timing Data @end ifinfo @section Interrupt Latency @@ -99,7 +99,7 @@ Computers CPU386 benchmark platform using the int instruction as the interrupt source. @ifinfo -@node i386 Timing Data Context Switch, i386 Timing Data Directive Times, i386 Timing Data Interrupt Latency, i386 Timing Data +@node CPU386 Timing Data Context Switch, CPU386 Timing Data Directive Times, CPU386 Timing Data Interrupt Latency, CPU386 Timing Data @end ifinfo @section Context Switch diff --git a/doc/supplements/i386/timedata.t b/doc/supplements/i386/timedata.t index a13dffb476..0d1fd6c5dd 100644 --- a/doc/supplements/i386/timedata.t +++ b/doc/supplements/i386/timedata.t @@ -12,34 +12,34 @@ @end tex @ifinfo -@node i386 Timing Data, i386 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top +@node CPU386 Timing Data, CPU386 Timing Data Introduction, Memory Requirements RTEMS RAM Workspace Worksheet, Top @end ifinfo -@chapter i386 Timing Data +@chapter CPU386 Timing Data @ifinfo @menu -* i386 Timing Data Introduction:: -* i386 Timing Data Hardware Platform:: -* i386 Timing Data Interrupt Latency:: -* i386 Timing Data Context Switch:: -* i386 Timing Data Directive Times:: -* i386 Timing Data Task Manager:: -* i386 Timing Data Interrupt Manager:: -* i386 Timing Data Clock Manager:: -* i386 Timing Data Timer Manager:: -* i386 Timing Data Semaphore Manager:: -* i386 Timing Data Message Manager:: -* i386 Timing Data Event Manager:: -* i386 Timing Data Signal Manager:: -* i386 Timing Data Partition Manager:: -* i386 Timing Data Region Manager:: -* i386 Timing Data Dual-Ported Memory Manager:: -* i386 Timing Data I/O Manager:: -* i386 Timing Data Rate Monotonic Manager:: +* CPU386 Timing Data Introduction:: +* CPU386 Timing Data Hardware Platform:: +* CPU386 Timing Data Interrupt Latency:: +* CPU386 Timing Data Context Switch:: +* CPU386 Timing Data Directive Times:: +* CPU386 Timing Data Task Manager:: +* CPU386 Timing Data Interrupt Manager:: +* CPU386 Timing Data Clock Manager:: +* CPU386 Timing Data Timer Manager:: +* CPU386 Timing Data Semaphore Manager:: +* CPU386 Timing Data Message Manager:: +* CPU386 Timing Data Event Manager:: +* CPU386 Timing Data Signal Manager:: +* CPU386 Timing Data Partition Manager:: +* CPU386 Timing Data Region Manager:: +* CPU386 Timing Data Dual-Ported Memory Manager:: +* CPU386 Timing Data I/O Manager:: +* CPU386 Timing Data Rate Monotonic Manager:: @end menu @end ifinfo @ifinfo -@node i386 Timing Data Introduction, i386 Timing Data Hardware Platform, i386 Timing Data, i386 Timing Data +@node CPU386 Timing Data Introduction, CPU386 Timing Data Hardware Platform, CPU386 Timing Data, CPU386 Timing Data @end ifinfo @section Introduction @@ -52,7 +52,7 @@ is a description of the interrupt latency and the context switch times as they pertain to the i386 version of RTEMS. @ifinfo -@node i386 Timing Data Hardware Platform, i386 Timing Data Interrupt Latency, i386 Timing Data Introduction, i386 Timing Data +@node CPU386 Timing Data Hardware Platform, CPU386 Timing Data Interrupt Latency, CPU386 Timing Data Introduction, CPU386 Timing Data @end ifinfo @section Hardware Platform @@ -74,7 +74,7 @@ instructions to disable and enable interrupts, was divided by 16 to simulate a i386 executing at 16 Mhz. @ifinfo -@node i386 Timing Data Interrupt Latency, i386 Timing Data Context Switch, i386 Timing Data Hardware Platform, i386 Timing Data +@node CPU386 Timing Data Interrupt Latency, CPU386 Timing Data Context Switch, CPU386 Timing Data Hardware Platform, CPU386 Timing Data @end ifinfo @section Interrupt Latency @@ -99,7 +99,7 @@ Computers CPU386 benchmark platform using the int instruction as the interrupt source. @ifinfo -@node i386 Timing Data Context Switch, i386 Timing Data Directive Times, i386 Timing Data Interrupt Latency, i386 Timing Data +@node CPU386 Timing Data Context Switch, CPU386 Timing Data Directive Times, CPU386 Timing Data Interrupt Latency, CPU386 Timing Data @end ifinfo @section Context Switch -- cgit v1.2.3