From 3a5676e7212a9214397e05bfe99efc8326a3cbec Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 19 Oct 1998 17:56:29 +0000 Subject: All files as automatically generated as possible. --- doc/supplements/hppa1_1/Makefile | 35 ++++------ doc/supplements/hppa1_1/bsp.t | 19 ------ doc/supplements/hppa1_1/cputable.t | 19 +----- doc/supplements/hppa1_1/fatalerr.t | 15 ----- doc/supplements/hppa1_1/hppa1_1.texi | 2 +- doc/supplements/hppa1_1/intr_NOTIMES.t | 33 +--------- doc/supplements/hppa1_1/timedata.t | 113 --------------------------------- 7 files changed, 18 insertions(+), 218 deletions(-) delete mode 100644 doc/supplements/hppa1_1/timedata.t (limited to 'doc/supplements/hppa1_1') diff --git a/doc/supplements/hppa1_1/Makefile b/doc/supplements/hppa1_1/Makefile index 91cdf62344..e354eb85fd 100644 --- a/doc/supplements/hppa1_1/Makefile +++ b/doc/supplements/hppa1_1/Makefile @@ -22,12 +22,10 @@ COMMON_FILES=../../common/cpright.texi ../../common/setup.texi GENERATED_FILES=\ cpumodel.texi callconv.texi memmodel.texi intr.texi fatalerr.texi \ - bsp.texi cputable.texi wksheets.texi - -# timing.texi timeBSP.texi + bsp.texi cputable.texi wksheets.texi timing.texi timeSIMHPPA.texi FILES= $(PROJECT).texi \ - preface.texi timetbl.texi timedata.texi \ + preface.texi \ $(GENERATED_FILES) info: dirs c_hppa1_1 @@ -46,8 +44,6 @@ $(PROJECT).ps: $(PROJECT).dvi $(PROJECT).dvi: $(FILES) $(TEXI2DVI) $(PROJECT).texi -replace: timedata.texi - # # Chapters which get automatic processing # @@ -78,9 +74,11 @@ intr.t: intr_NOTIMES.t SIMHPPA_TIMES intr.texi: intr.t Makefile $(BMENU) -p "Memory Model Flat Memory Model" \ -u "Top" \ + -n "Default Fatal Error Processing" ${*}.t + fatalerr.texi: fatalerr.t Makefile - $(BMENU) -p "Interrupt Processing Interrupt Stack" \ + $(BMENU) -p "Interrupt Processing Disabling of Interrupts by RTEMS" \ -u "Top" \ -n "Board Support Packages" ${*}.t @@ -94,7 +92,6 @@ cputable.texi: cputable.t Makefile -u "Top" \ -n "Memory Requirements" ${*}.t - # Worksheets Chapter: # 1. Obtain the Shared File # 2. Replace Times and Sizes @@ -124,19 +121,15 @@ timing.texi: timing.t Makefile -u "Top" \ -n "HP-7100 Timing Data" ${*}.t -# Timing Chapter - -timetbl.t: ../../common/timetbl.t - sed -e 's/TIMETABLE_NEXT_LINK/Command and Variable Index/' \ - <../../common/timetbl.t >timetbl.t - -timetbl.texi: timetbl.t SIMHPPA_TIMES - ${REPLACE} -p SIMHPPA_TIMES timetbl.t - mv timetbl.t.fixed timetbl.texi +# Timing Data for BSP Chapter: +# 1. Copy the Shared File +# 2. Replace Times and Sizes +# 3. Build Node Structure -timedata.texi: timedata.t SIMHPPA_TIMES - ${REPLACE} -p SIMHPPA_TIMES timedata.t - mv timedata.t.fixed timedata.texi +timeSIMHPPA.texi: timeSIMHPPA.t Makefile + $(BMENU) -p "Timing Specification Terminology" \ + -u "Top" \ + -n "Command and Variable Index" ${*}.t html: dirs $(FILES) -mkdir -p $(WWW_INSTALL)/c_$(PROJECT) @@ -148,7 +141,7 @@ clean: rm -f *.dvi *.ps *.log *.aux *.cp *.fn *.ky *.pg *.toc *.tp *.vr $(BASE) rm -f $(PROJECT) $(PROJECT)-* rm -f c_hppa1_1 c_hppa1_1-* - rm -f timedata.texi timetbl.texi timetbl.t intr.t + rm -f intr.t rm -f timing.t timing.texi rm -f wksheets.t wksheets_NOTIMES.t $(GENERATED_FILES) rm -f *.fixed _* diff --git a/doc/supplements/hppa1_1/bsp.t b/doc/supplements/hppa1_1/bsp.t index 716701aa40..1ec4380589 100644 --- a/doc/supplements/hppa1_1/bsp.t +++ b/doc/supplements/hppa1_1/bsp.t @@ -6,21 +6,8 @@ @c $Id$ @c -@ifinfo -@node Board Support Packages, Board Support Packages Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Top -@end ifinfo @chapter Board Support Packages -@ifinfo -@menu -* Board Support Packages Introduction:: -* Board Support Packages System Reset:: -* Board Support Packages Processor Initialization:: -@end menu -@end ifinfo -@ifinfo -@node Board Support Packages Introduction, Board Support Packages System Reset, Board Support Packages, Board Support Packages -@end ifinfo @section Introduction An RTEMS Board Support Package (BSP) must be designed @@ -30,9 +17,6 @@ issues. For more information on developing a BSP, refer to the chapter titled Board Support Packages in the RTEMS Applications User's Guide. -@ifinfo -@node Board Support Packages System Reset, Board Support Packages Processor Initialization, Board Support Packages Introduction, Board Support Packages -@end ifinfo @section System Reset An RTEMS based application is initiated or @@ -40,9 +24,6 @@ re-initiated when the PA-RISC processor is reset. The behavior of a PA-RISC upon reset is implementation defined and thus is beyond the scope of this manual. -@ifinfo -@node Board Support Packages Processor Initialization, Processor Dependent Information Table, Board Support Packages System Reset, Board Support Packages -@end ifinfo @section Processor Initialization The precise requirements for initialization of a diff --git a/doc/supplements/hppa1_1/cputable.t b/doc/supplements/hppa1_1/cputable.t index 9ea5c1e415..940510ce86 100644 --- a/doc/supplements/hppa1_1/cputable.t +++ b/doc/supplements/hppa1_1/cputable.t @@ -6,20 +6,8 @@ @c $Id$ @c -@ifinfo -@node Processor Dependent Information Table, Processor Dependent Information Table Introduction, Board Support Packages Processor Initialization, Top -@end ifinfo -@chapter Processor Dependent Information Table -@ifinfo -@menu -* Processor Dependent Information Table Introduction:: -* Processor Dependent Information Table CPU Dependent Information Table:: -@end menu -@end ifinfo - -@ifinfo -@node Processor Dependent Information Table Introduction, Processor Dependent Information Table CPU Dependent Information Table, Processor Dependent Information Table, Processor Dependent Information Table -@end ifinfo +@chapter Processor Dependent Information Table + @section Introduction Any highly processor dependent information required @@ -28,9 +16,6 @@ Dependent Information Table. This table is not required for all processors supported by RTEMS. This chapter describes the contents, if any, for a particular processor type. -@ifinfo -@node Processor Dependent Information Table CPU Dependent Information Table, Memory Requirements, Processor Dependent Information Table Introduction, Processor Dependent Information Table -@end ifinfo @section CPU Dependent Information Table The PA-RISC version of the RTEMS CPU Dependent diff --git a/doc/supplements/hppa1_1/fatalerr.t b/doc/supplements/hppa1_1/fatalerr.t index 90fba387d5..d5998d81a5 100644 --- a/doc/supplements/hppa1_1/fatalerr.t +++ b/doc/supplements/hppa1_1/fatalerr.t @@ -6,20 +6,8 @@ @c $Id$ @c -@ifinfo -@node Default Fatal Error Processing, Default Fatal Error Processing Introduction, Interrupt Processing Disabling of Interrupts by RTEMS, Top -@end ifinfo @chapter Default Fatal Error Processing -@ifinfo -@menu -* Default Fatal Error Processing Introduction:: -* Default Fatal Error Processing Default Fatal Error Handler Operations:: -@end menu -@end ifinfo -@ifinfo -@node Default Fatal Error Processing Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Default Fatal Error Processing, Default Fatal Error Processing -@end ifinfo @section Introduction Upon detection of a fatal error by either the @@ -32,9 +20,6 @@ default fatal error handler is then invoked. This chapter describes the precise operations of the default fatal error handler. -@ifinfo -@node Default Fatal Error Processing Default Fatal Error Handler Operations, Board Support Packages, Default Fatal Error Processing Introduction, Default Fatal Error Processing -@end ifinfo @section Default Fatal Error Handler Operations The default fatal error handler which is invoked by diff --git a/doc/supplements/hppa1_1/hppa1_1.texi b/doc/supplements/hppa1_1/hppa1_1.texi index dfa20f5db5..19d700fe63 100644 --- a/doc/supplements/hppa1_1/hppa1_1.texi +++ b/doc/supplements/hppa1_1/hppa1_1.texi @@ -72,7 +72,7 @@ END-INFO-DIR-ENTRY @include cputable.texi @include wksheets.texi @include timing.texi -@include timedata.texi +@include timeSIMHPPA.texi @ifinfo @node Top, Preface, (dir), (dir) @top c_hppa1_1 diff --git a/doc/supplements/hppa1_1/intr_NOTIMES.t b/doc/supplements/hppa1_1/intr_NOTIMES.t index 70a1d3a27f..9ec3ae152d 100644 --- a/doc/supplements/hppa1_1/intr_NOTIMES.t +++ b/doc/supplements/hppa1_1/intr_NOTIMES.t @@ -6,24 +6,8 @@ @c $Id$ @c -@ifinfo -@node Interrupt Processing, Interrupt Processing Introduction, Memory Model Flat Memory Model, Top -@end ifinfo @chapter Interrupt Processing -@ifinfo -@menu -* Interrupt Processing Introduction:: -* Interrupt Processing Vectoring of Interrupt Handler:: -* Interrupt Processing Interrupt Stack Frame:: -* Interrupt Processing External Interrupts and Traps:: -* Interrupt Processing Interrupt Levels:: -* Interrupt Processing Disabling of Interrupts by RTEMS:: -@end menu -@end ifinfo - -@ifinfo -@node Interrupt Processing Introduction, Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing, Interrupt Processing -@end ifinfo + @section Introduction Different types of processors respond to the @@ -41,9 +25,6 @@ unique architecture. Discussed in this chapter are the PA-RISC's interrupt response and control mechanisms as they pertain to RTEMS. -@ifinfo -@node Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing Interrupt Stack Frame, Interrupt Processing Introduction, Interrupt Processing -@end ifinfo @section Vectoring of Interrupt Handler Upon receipt of an interrupt the PA-RISC @@ -115,9 +96,6 @@ the exception that the nested interrupt occurred while executing on the interrupt stack and, thus, the current stack need not be switched. -@ifinfo -@node Interrupt Processing Interrupt Stack Frame, Interrupt Processing External Interrupts and Traps, Interrupt Processing Vectoring of Interrupt Handler, Interrupt Processing -@end ifinfo @section Interrupt Stack Frame The PA-RISC architecture does not alter the stack @@ -138,9 +116,6 @@ the PA-RISC as defined by RTEMS: @end group @end example -@ifinfo -@node Interrupt Processing External Interrupts and Traps, Interrupt Processing Interrupt Levels, Interrupt Processing Interrupt Stack Frame, Interrupt Processing -@end ifinfo @section External Interrupts and Traps In addition to the thirty-two unique interrupt @@ -171,9 +146,6 @@ not have a handler configured, then the spurious interrupt handler will be invoked. The spurious interrupt handler may also be specifiec by the user in the CPU Configuration Table. -@ifinfo -@node Interrupt Processing Interrupt Levels, Interrupt Processing Disabling of Interrupts by RTEMS, Interrupt Processing External Interrupts and Traps, Interrupt Processing -@end ifinfo @section Interrupt Levels Two levels (enabled and disabled) of interrupt @@ -195,9 +167,6 @@ indicates that interrupts are enabled and level 1 indicates that interrupts are disabled. All other RTEMS interrupt levels are undefined and their behavior is unpredictable. -@ifinfo -@node Interrupt Processing Disabling of Interrupts by RTEMS, Default Fatal Error Processing, Interrupt Processing Interrupt Levels, Interrupt Processing -@end ifinfo @section Disabling of Interrupts by RTEMS During the execution of directive calls, critical diff --git a/doc/supplements/hppa1_1/timedata.t b/doc/supplements/hppa1_1/timedata.t deleted file mode 100644 index 0168d4f3b5..0000000000 --- a/doc/supplements/hppa1_1/timedata.t +++ /dev/null @@ -1,113 +0,0 @@ -@c -@c COPYRIGHT (c) 1988-1998. -@c On-Line Applications Research Corporation (OAR). -@c All rights reserved. -@c -@c $Id$ -@c - -@ifinfo -@node HP-7100 Timing Data, HP-7100 Timing Data Introduction, Timing Specification Terminology, Top -@end ifinfo -@chapter HP-7100 Timing Data -@ifinfo -@menu -* HP-7100 Timing Data Introduction:: -* HP-7100 Timing Data Hardware Platform:: -* HP-7100 Timing Data Interrupt Latency:: -* HP-7100 Timing Data Context Switch:: -* HP-7100 Timing Data Directive Times:: -@end menu -@end ifinfo - -@ifinfo -@node HP-7100 Timing Data Introduction, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data, HP-7100 Timing Data -@end ifinfo -@section Introduction - -The timing data for the PA-RISC version of RTEMS is -provided along with the target dependent aspects concerning the -gathering of the timing data. The hardware platform used to -gather the times is described to give the reader a better -understanding of each directive time provided. Also, provided -is a description of the interrupt latency and the context -switch times as they pertain to the PA-RISC version of RTEMS. - -@ifinfo -@node HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Introduction, HP-7100 Timing Data -@end ifinfo -@section Hardware Platform - -No directive execution times are reported for the -HP-7100 because the target platform was proprietary and -executions times could not be released. - -@ifinfo -@node HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data Context Switch, HP-7100 Timing Data Hardware Platform, HP-7100 Timing Data -@end ifinfo -@section Interrupt Latency - -The maximum period with traps disabled or the -processor interrupt level set to it's highest value inside RTEMS -is less than RTEMS_MAXIMUM_DISABLE_PERIOD -microseconds including the instructions which -disable and re-enable interrupts. The time required for the -HP-7100 to vector an interrupt and for the RTEMS entry overhead -before invoking the user's trap handler are a total of -RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK -microseconds. These combine to yield a worst case interrupt -latency of less than RTEMS_MAXIMUM_DISABLE_PERIOD + -RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK microseconds at 15 Mhz. -[NOTE: The maximum period with interrupts disabled was last -determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.] - -It should be noted again that the maximum period with -interrupts disabled within RTEMS for the HP-7100 is hand calculated. - -@ifinfo -@node HP-7100 Timing Data Context Switch, HP-7100 Timing Data Directive Times, HP-7100 Timing Data Interrupt Latency, HP-7100 Timing Data -@end ifinfo -@section Context Switch - -The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS -microsections for the HP-7100 when no floating point context -switch is saved or restored. Saving and restoring the floating -point context adds additional time to the context -switch procedure. Additional execution time is required when a -TASK_SWITCH user extension is configured. The use of the -TASK_SWITCH extension is application dependent. Thus, its -execution time is not considered part of the raw context switch -time. - -Since RTEMS was designed specifically for embedded -missile applications which are floating point intensive, the -executive is optimized to avoid unnecessarily saving and -restoring the state of the numeric coprocessor. On many -processors, the state of the numeric coprocessor is only saved -when an FLOATING_POINT task is dispatched and that task was not -the last task to utilize the coprocessor. In a system with only -one FLOATING_POINT task, the state of the numeric coprocessor -will never be saved or restored. When the first FLOATING_POINT -task is dispatched, RTEMS does not need to save the current -state of the numeric coprocessor. As discussed in the Register -Usage section, on the HP-7100 the every task is considered to be -floating point registers and , as a rsule, every context switch -involves saving and restoring the state of the floating point -unit. - -The following table summarizes the context switch -times for the HP-7100 processor: - -@example -no times are available for the HP-7100 -@end example - -@ifinfo -@node HP-7100 Timing Data Directive Times, Command and Variable Index, HP-7100 Timing Data Context Switch, HP-7100 Timing Data -@end ifinfo -@section Directive Times - -No execution times are available for the HP-7100 -because the target platform was proprietary and no timing -information could be released. - -- cgit v1.2.3