From f4fe0e9a3cc39591879d1a3c5b5c9bb72c091af7 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 26 Feb 2004 17:23:54 +0000 Subject: 2004-02-26 Andreas Karlsson * cpu_asm.S: Close window while restoring interrupted task state which resulted in CWP corruption. --- cpukit/score/cpu/sparc/ChangeLog | 5 +++++ cpukit/score/cpu/sparc/cpu_asm.S | 11 +++++++++++ 2 files changed, 16 insertions(+) (limited to 'cpukit') diff --git a/cpukit/score/cpu/sparc/ChangeLog b/cpukit/score/cpu/sparc/ChangeLog index 230da65ca7..f0b277a9c6 100644 --- a/cpukit/score/cpu/sparc/ChangeLog +++ b/cpukit/score/cpu/sparc/ChangeLog @@ -1,3 +1,8 @@ +2004-02-26 Andreas Karlsson + + * cpu_asm.S: Close window while restoring interrupted task state which + resulted in CWP corruption. + 2004-01-21 Ralf Corsepius * configure.ac: Move RTEMS_TOP one subdir down. diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index ec0dce2bb9..357e3dcbd4 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -684,6 +684,17 @@ SYM(_ISR_Dispatch): call SYM(_Thread_Dispatch), 0 nop + /* + * We invoked _Thread_Dispatch in a state similar to the interrupted + * task. In order to safely be able to tinker with the register + * windows and get the task back to its pre-interrupt state, + * we need to disable interrupts disabled so we can safely tinker + * with the register windowing. In particular, the CWP in the PSR + * is fragile during this period. (See PR578.) + */ + mov 2,%g1 ! syscall (disable interrupts) + ta 0 ! syscall (disable interrupts) + /* * The CWP in place at this point may be different from * that which was in effect at the beginning of the ISR if we -- cgit v1.2.3