From c18134552a66037e894b1a11060dd59883950558 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 9 Apr 2004 14:52:40 +0000 Subject: 2004-04-09 Joel Sherrill PR 605/bsps * cpu.c: Do not use C++ style comments. --- cpukit/score/cpu/mips/ChangeLog | 5 +++++ cpukit/score/cpu/mips/cpu.c | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'cpukit') diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 63b7655a21..e4a3ada22a 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2004-04-09 Joel Sherrill + + PR 605/bsps + * cpu.c: Do not use C++ style comments. + 2004-04-06 Ralf Corsepius * configure.ac: Remove (Merged into $(top_srcdir)/configure.ac). diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index 50904f9371..2c601c693d 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -99,7 +99,7 @@ uint32_t _CPU_ISR_Get_level( void ) mips_get_sr(sr); - //printf("current sr=%08X, ",sr); + /* printf("current sr=%08X, ",sr); */ #if __mips == 3 /* EXL bit and shift down hardware ints into bits 1 thru 6 */ @@ -112,7 +112,7 @@ uint32_t _CPU_ISR_Get_level( void ) #else #error "CPU ISR level: unknown MIPS level for SR handling" #endif - //printf("intlevel=%02X\n",sr); + /* printf("intlevel=%02X\n",sr); */ return sr; } -- cgit v1.2.3