From 42540ecd0e692820604bc5723f2a06f9359d22dc Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Tue, 30 Mar 2004 11:46:13 +0000 Subject: 2004-03-30 Ralf Corsepius * cpu.c, cpu_asm.c, rtems/score/cpu.h: Convert to using c99 fixed size types. --- cpukit/score/cpu/or32/ChangeLog | 5 +++++ cpukit/score/cpu/or32/cpu.c | 14 +++++++------- cpukit/score/cpu/or32/cpu_asm.c | 24 +++++++++++------------ cpukit/score/cpu/or32/rtems/score/cpu.h | 34 ++++++++++++++++----------------- 4 files changed, 41 insertions(+), 36 deletions(-) (limited to 'cpukit') diff --git a/cpukit/score/cpu/or32/ChangeLog b/cpukit/score/cpu/or32/ChangeLog index e0713995d7..50d6fc8daa 100644 --- a/cpukit/score/cpu/or32/ChangeLog +++ b/cpukit/score/cpu/or32/ChangeLog @@ -1,3 +1,8 @@ +2004-03-30 Ralf Corsepius + + * cpu.c, cpu_asm.c, rtems/score/cpu.h: Convert to using c99 fixed + size types. + 2004-03-29 Ralf Corsepius * configure.ac: RTEMS_TOP([../../../..]). diff --git a/cpukit/score/cpu/or32/cpu.c b/cpukit/score/cpu/or32/cpu.c index 1291178b5c..06393d4717 100644 --- a/cpukit/score/cpu/or32/cpu.c +++ b/cpukit/score/cpu/or32/cpu.c @@ -72,9 +72,9 @@ void _CPU_Initialize( * met, interrupts are disabled, and a level of 1 is returned. */ -inline unsigned32 _CPU_ISR_Get_level( void ) +inline uint32_t _CPU_ISR_Get_level( void ) { - register unsigned32 sr; + register uint32_t sr; asm("l.mfspr %0,r0,0x17" : "=r" (sr)); return !((sr & SR_EXR) && (sr & SR_EIR)); } @@ -93,14 +93,14 @@ inline unsigned32 _CPU_ISR_Get_level( void ) */ void _CPU_ISR_install_raw_handler( - unsigned32 vector, + uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler ) { - register unsigned32 sr; - register unsigned32 tmp; - extern unsigned32 Or1k_Interrupt_Vectors[]; + register uint32_t sr; + register uint32_t tmp; + extern uint32_t Or1k_Interrupt_Vectors[]; asm volatile ("l.mfspr %0,r0,0x11\n\t" "l.addi %1,r0,-5\n\t" @@ -131,7 +131,7 @@ void _CPU_ISR_install_raw_handler( */ void _CPU_ISR_install_vector( - unsigned32 vector, + uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler ) diff --git a/cpukit/score/cpu/or32/cpu_asm.c b/cpukit/score/cpu/or32/cpu_asm.c index be851981f3..e8a0c395ae 100644 --- a/cpukit/score/cpu/or32/cpu_asm.c +++ b/cpukit/score/cpu/or32/cpu_asm.c @@ -76,10 +76,10 @@ void _CPU_Context_save_fp( void **fp_context_ptr ) { - register unsigned32 temp; - register unsigned32 address = (unsigned32)(*fp_context_ptr); - register unsigned32 xfer; - register unsigned32 loop; + register uint32_t temp; + register uint32_t address = (uint32_t )(*fp_context_ptr); + register uint32_t xfer; + register uint32_t loop; /* %0 is a temporary register which is used for several values throughout the code. %3 contains the address @@ -134,10 +134,10 @@ void _CPU_Context_restore_fp( void **fp_context_ptr ) { - register unsigned32 temp; - register unsigned32 address = (unsigned32)(*fp_context_ptr); - register unsigned32 xfer; - register unsigned32 loop; + register uint32_t temp; + register uint32_t address = (uint32_t )(*fp_context_ptr); + register uint32_t xfer; + register uint32_t loop; /* The reverse of Context_save_fp */ /* %0 is a temporary register which is used for several @@ -193,8 +193,8 @@ void _CPU_Context_switch( Context_Control *heir ) { - register unsigned32 temp1 = 0; - register unsigned32 temp2 = 0; + register uint32_t temp1 = 0; + register uint32_t temp2 = 0; /* This function is really tricky. When this function is called, we should save our state as we need it, and then grab the @@ -498,8 +498,8 @@ void _CPU_Context_restore( * and the exception architecture described in chapter 9 */ -void _ISR_Handler(unsigned32 vector,unsigned32 ProgramCounter, - unsigned32 EffectiveAddress,unsigned32 StatusRegister) +void _ISR_Handler(uint32_t vector,uint32_t ProgramCounter, + uint32_t EffectiveAddress,uint32_t StatusRegister) { /* * This discussion ignores a lot of the ugly details in a real diff --git a/cpukit/score/cpu/or32/rtems/score/cpu.h b/cpukit/score/cpu/or32/rtems/score/cpu.h index 2aa0662902..1fe9218c76 100644 --- a/cpukit/score/cpu/or32/rtems/score/cpu.h +++ b/cpukit/score/cpu/or32/rtems/score/cpu.h @@ -376,9 +376,9 @@ extern "C" { */ #ifdef OR1K_64BIT_ARCH -#define or1kreg unsigned64 +#define or1kreg uint64_t #else -#define or1kreg unsigned32 +#define or1kreg uint32_t #endif /* SR_MASK is the mask of values that will be copied to/from the status @@ -433,10 +433,10 @@ typedef enum { } StatusRegisterBits; typedef struct { - unsigned32 sr; /* Current status register non persistent values */ - unsigned32 esr; /* Saved exception status register */ - unsigned32 ear; /* Saved exception effective address register */ - unsigned32 epc; /* Saved exception PC register */ + uint32_t sr; /* Current status register non persistent values */ + uint32_t esr; /* Saved exception status register */ + uint32_t ear; /* Saved exception effective address register */ + uint32_t epc; /* Saved exception PC register */ or1kreg r[31]; /* Registers */ or1kreg pc; /* Context PC 4 or 8 bytes for 64 bit alignment */ } Context_Control; @@ -459,10 +459,10 @@ typedef struct { void (*postdriver_hook)( void ); void (*idle_task)( void ); boolean do_zero_of_workspace; - unsigned32 idle_task_stack_size; - unsigned32 interrupt_stack_size; - unsigned32 extra_mpci_receive_server_stack; - void * (*stack_allocate_hook)( unsigned32 ); + uint32_t idle_task_stack_size; + uint32_t interrupt_stack_size; + uint32_t extra_mpci_receive_server_stack; + void * (*stack_allocate_hook)( uint32_t ); void (*stack_free_hook)( void* ); /* end of fields required on all CPUs */ } rtems_cpu_table; @@ -691,7 +691,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); { \ } -unsigned32 _CPU_ISR_Get_level( void ); +uint32_t _CPU_ISR_Get_level( void ); /* end of ISR handler macros */ @@ -723,10 +723,10 @@ unsigned32 _CPU_ISR_Get_level( void ); _isr, _entry_point, _is_fp ) \ { \ memset(_the_context,'\0',sizeof(Context_Control)); \ - (_the_context)->r[1] = (unsigned32*) ((unsigned32) (_stack_base) + (_size) ); \ - (_the_context)->r[2] = (unsigned32*) ((unsigned32) (_stack_base)); \ + (_the_context)->r[1] = (uint32_t *) ((uint32_t ) (_stack_base) + (_size) ); \ + (_the_context)->r[2] = (uint32_t *) ((uint32_t ) (_stack_base)); \ (_the_context)->sr = (_isr) ? 0x0000001B : 0x0000001F; \ - (_the_context)->pc = (unsigned32*) _entry_point ; \ + (_the_context)->pc = (uint32_t *) _entry_point ; \ } /* @@ -928,7 +928,7 @@ void _CPU_Initialize( */ void _CPU_ISR_install_raw_handler( - unsigned32 vector, + uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler ); @@ -944,7 +944,7 @@ void _CPU_ISR_install_raw_handler( */ void _CPU_ISR_install_vector( - unsigned32 vector, + uint32_t vector, proc_ptr new_handler, proc_ptr *old_handler ); @@ -1050,7 +1050,7 @@ static inline unsigned int CPU_swap_u32( unsigned int value ) { - unsigned32 byte1, byte2, byte3, byte4, swapped; + uint32_t byte1, byte2, byte3, byte4, swapped; byte4 = (value >> 24) & 0xff; byte3 = (value >> 16) & 0xff; -- cgit v1.2.3