From 35e0394165657495d4ee19fccdf46c0cebbbf2d3 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 1 Sep 2015 09:42:46 +0200 Subject: arm: Use compiler memory barrier by default --- cpukit/score/cpu/arm/rtems/score/cpu.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'cpukit') diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index 6aced79b3b..6ed6ef9a1f 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -8,7 +8,7 @@ * This include file contains information pertaining to the ARM * processor. * - * Copyright (c) 2009-2014 embedded brains GmbH. + * Copyright (c) 2009-2015 embedded brains GmbH. * * Copyright (c) 2007 Ray Xu * @@ -301,6 +301,8 @@ static inline void _ARM_Data_memory_barrier( void ) { #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS __asm__ volatile ( "dmb" : : : "memory" ); +#else + RTEMS_COMPILER_MEMORY_BARRIER(); #endif } @@ -308,6 +310,8 @@ static inline void _ARM_Data_synchronization_barrier( void ) { #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS __asm__ volatile ( "dsb" : : : "memory" ); +#else + RTEMS_COMPILER_MEMORY_BARRIER(); #endif } @@ -315,6 +319,8 @@ static inline void _ARM_Instruction_synchronization_barrier( void ) { #ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS __asm__ volatile ( "isb" : : : "memory" ); +#else + RTEMS_COMPILER_MEMORY_BARRIER(); #endif } -- cgit v1.2.3