From 10fd4aacc7c2788ebc6a696174ae0a98c4a83dd3 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 2 Aug 2013 13:54:08 +0200 Subject: score/cpu: Add CPU_Per_CPU_control Add CPU port specific per-CPU control. --- cpukit/score/cpu/arm/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/avr/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/bfin/rtems/score/cpu.h | 10 ++++++++-- cpukit/score/cpu/h8300/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/i386/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/lm32/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/m32c/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/m32r/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/m68k/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/mips/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/moxie/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/nios2/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 18 ++++++++++++++++++ cpukit/score/cpu/powerpc/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/sh/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/sparc/rtems/score/cpu.h | 7 +++++++ cpukit/score/cpu/sparc64/rtems/score/cpu.h | 6 ++++++ cpukit/score/cpu/v850/rtems/score/cpu.h | 6 ++++++ cpukit/score/include/rtems/score/percpu.h | 9 +++++++-- cpukit/score/src/percpuasm.c | 5 +++++ 20 files changed, 135 insertions(+), 4 deletions(-) (limited to 'cpukit') diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h index a8e9493fd0..a11de9a4c9 100644 --- a/cpukit/score/cpu/arm/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/rtems/score/cpu.h @@ -208,6 +208,8 @@ #define CPU_USE_GENERIC_BITFIELD_DATA TRUE +#define CPU_PER_CPU_CONTROL_SIZE 0 + /** @} */ #ifdef ARM_MULTILIB_VFP_D32 @@ -233,6 +235,10 @@ extern "C" { */ /**@{**/ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + typedef struct { #if defined(ARM_MULTILIB_ARCH_V4) uint32_t register_cpsr; diff --git a/cpukit/score/cpu/avr/rtems/score/cpu.h b/cpukit/score/cpu/avr/rtems/score/cpu.h index 080f387923..b67b2416a5 100644 --- a/cpukit/score/cpu/avr/rtems/score/cpu.h +++ b/cpukit/score/cpu/avr/rtems/score/cpu.h @@ -374,6 +374,8 @@ extern "C" { #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -386,6 +388,10 @@ extern "C" { #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* * Contexts * diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index 8065bbf164..1af3f81f81 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -397,6 +397,8 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -407,6 +409,12 @@ extern "C" { /* may need to put some structures here. */ +#ifndef ASM + +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * @@ -450,8 +458,6 @@ extern "C" { */ /**@{**/ -#ifndef ASM - /** * This defines the minimal set of integer and processor state registers * that must be saved during a voluntary context switch from one thread diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h index ea0ee7ce85..f75f2e5825 100644 --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h +++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h @@ -342,6 +342,8 @@ extern "C" { #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -393,6 +395,10 @@ extern "C" { #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + #define nogap __attribute__ ((packed)) typedef struct { diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h index d23926e94e..43422ed9d7 100644 --- a/cpukit/score/cpu/i386/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/rtems/score/cpu.h @@ -126,10 +126,16 @@ extern "C" { #define CPU_BIG_ENDIAN FALSE #define CPU_LITTLE_ENDIAN TRUE +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* structures */ #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* * Basic integer context for the i386 family. */ diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h index eef9ac8377..95553efa48 100644 --- a/cpukit/score/cpu/lm32/rtems/score/cpu.h +++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h @@ -391,6 +391,8 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -401,6 +403,10 @@ extern "C" { /* may need to put some structures here. */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h index ccb9e38099..5841885c8e 100644 --- a/cpukit/score/cpu/m32c/rtems/score/cpu.h +++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h @@ -414,6 +414,8 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -424,6 +426,10 @@ extern "C" { /* may need to put some structures here. */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * diff --git a/cpukit/score/cpu/m32r/rtems/score/cpu.h b/cpukit/score/cpu/m32r/rtems/score/cpu.h index 2c97ddb45a..0fea7bdc4b 100644 --- a/cpukit/score/cpu/m32r/rtems/score/cpu.h +++ b/cpukit/score/cpu/m32r/rtems/score/cpu.h @@ -407,6 +407,8 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -417,6 +419,10 @@ extern "C" { /* may need to put some structures here. */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h index 2af5be86f9..ccec3a6a64 100644 --- a/cpukit/score/cpu/m68k/rtems/score/cpu.h +++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h @@ -112,6 +112,8 @@ extern "C" { #define CPU_BIG_ENDIAN TRUE #define CPU_LITTLE_ENDIAN FALSE +#define CPU_PER_CPU_CONTROL_SIZE 0 + #if ( CPU_HARDWARE_FP == TRUE ) && !defined( __mcoldfire__ ) #if defined( __mc68060__ ) #define M68K_FP_STATE_SIZE 16 @@ -124,6 +126,10 @@ extern "C" { /* structures */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* * Basic integer context for the m68k family. */ diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index 229490bd9b..beb03bfbf6 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -353,6 +353,8 @@ extern "C" { #define CPU_SIZEOF_POINTER 4 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures * @@ -399,6 +401,10 @@ extern "C" { #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* WARNING: If this structure is modified, the constants in cpu.h must be updated. */ #if (__mips == 1) || (__mips == 32) #define __MIPS_REGISTER_TYPE uint32_t diff --git a/cpukit/score/cpu/moxie/rtems/score/cpu.h b/cpukit/score/cpu/moxie/rtems/score/cpu.h index 7c48d7b587..309110a399 100644 --- a/cpukit/score/cpu/moxie/rtems/score/cpu.h +++ b/cpukit/score/cpu/moxie/rtems/score/cpu.h @@ -330,6 +330,8 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -340,6 +342,10 @@ extern "C" { /* may need to put some structures here. */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* * Contexts * diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h index d3b50463dc..e0dfd9fd36 100644 --- a/cpukit/score/cpu/nios2/rtems/score/cpu.h +++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h @@ -112,8 +112,14 @@ extern "C" { #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 +#define CPU_PER_CPU_CONTROL_SIZE 0 + #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @brief Thread register context. * diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h index 0ffce818f8..391ade1791 100644 --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h @@ -474,6 +474,14 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +/** + * @brief The size of the CPU specific per-CPU control. + * + * This define must be visible to assember files since it is used to derive + * structure offsets. + */ +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. * @@ -484,6 +492,16 @@ extern "C" { /* may need to put some structures here. */ +/** + * @brief The CPU specific per-CPU control. + * + * The CPU port can place here all state information that must be available and + * maintained for each CPU in the system. + */ +typedef struct { + /* CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index 1ad56dc91a..3d88d9d476 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -212,6 +212,8 @@ extern "C" { #define CPU_IDLE_TASK_IS_FP FALSE +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. */ @@ -267,6 +269,10 @@ extern "C" { #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* Non-volatile context according to E500ABIUG and EABI */ typedef struct { uint32_t gpr1; diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h index d4412f6f46..41d96384de 100644 --- a/cpukit/score/cpu/sh/rtems/score/cpu.h +++ b/cpukit/score/cpu/sh/rtems/score/cpu.h @@ -297,12 +297,18 @@ extern "C" { #define CPU_MODES_INTERRUPT_MASK 0x0000000f +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * Processor defined structures required for cpukit/score. */ /* may need to put some structures here. */ +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /* * Contexts * diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h index 20040a9485..61f041005f 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h @@ -357,6 +357,8 @@ typedef struct { /** This defines the size of the minimum stack frame. */ #define CPU_MINIMUM_STACK_FRAME_SIZE 0x60 +#define CPU_PER_CPU_CONTROL_SIZE 0 + /** * @defgroup Contexts SPARC Context Structures * @@ -379,6 +381,11 @@ typedef struct { /**@{**/ #ifndef ASM + +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @brief SPARC basic context. * diff --git a/cpukit/score/cpu/sparc64/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/rtems/score/cpu.h index 314143b64f..8d3e27318b 100644 --- a/cpukit/score/cpu/sparc64/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc64/rtems/score/cpu.h @@ -224,6 +224,8 @@ extern "C" { #define CPU_MODES_INTERRUPT_MASK 0x0000000F +#define CPU_PER_CPU_CONTROL_SIZE 0 + /* * This structure represents the organization of the minimum stack frame * for the SPARC. More framing information is required in certain situaions @@ -233,6 +235,10 @@ extern "C" { #ifndef ASM +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + typedef struct { uint64_t l0; uint64_t l1; diff --git a/cpukit/score/cpu/v850/rtems/score/cpu.h b/cpukit/score/cpu/v850/rtems/score/cpu.h index 12c824bc24..3e110b5776 100644 --- a/cpukit/score/cpu/v850/rtems/score/cpu.h +++ b/cpukit/score/cpu/v850/rtems/score/cpu.h @@ -395,6 +395,12 @@ extern "C" { */ #define CPU_MODES_INTERRUPT_MASK 0x00000001 +#define CPU_PER_CPU_CONTROL_SIZE 0 + +typedef struct { + /* There is no CPU specific per-CPU state */ +} CPU_Per_CPU_control; + /** * @defgroup CPUContext Processor Dependent Context Management * diff --git a/cpukit/score/include/rtems/score/percpu.h b/cpukit/score/include/rtems/score/percpu.h index 14eed5a57f..e6713bf502 100644 --- a/cpukit/score/include/rtems/score/percpu.h +++ b/cpukit/score/include/rtems/score/percpu.h @@ -141,6 +141,11 @@ typedef enum { * This structure is used to hold per core state information. */ typedef struct { + /** + * @brief CPU port specific control. + */ + CPU_Per_CPU_control cpu_per_cpu; + #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \ (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) /** @@ -310,7 +315,7 @@ void _Per_CPU_Wait_for_state( * we need to have places in the per CPU table to hold them. */ #define PER_CPU_INTERRUPT_STACK_LOW \ - 0 + CPU_PER_CPU_CONTROL_SIZE #define PER_CPU_INTERRUPT_STACK_HIGH \ PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER #define PER_CPU_END_STACK \ @@ -322,7 +327,7 @@ void _Per_CPU_Wait_for_state( (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH) #else #define PER_CPU_END_STACK \ - 0 + CPU_PER_CPU_CONTROL_SIZE #endif /* diff --git a/cpukit/score/src/percpuasm.c b/cpukit/score/src/percpuasm.c index 60ca48dc5a..968bc4855f 100644 --- a/cpukit/score/src/percpuasm.c +++ b/cpukit/score/src/percpuasm.c @@ -33,6 +33,11 @@ RTEMS_STATIC_ASSERT( ); #endif +RTEMS_STATIC_ASSERT( + sizeof( CPU_Per_CPU_control ) == CPU_PER_CPU_CONTROL_SIZE, + CPU_PER_CPU_CONTROL_SIZE +); + #if defined( RTEMS_SMP ) RTEMS_STATIC_ASSERT( sizeof( Per_CPU_Control_envelope ) == PER_CPU_CONTROL_SIZE, -- cgit v1.2.3