From 8b65b57472d5086f2c035a09fdb07a40285beb4a Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Wed, 28 Jul 2021 14:41:32 +0200 Subject: score: Canonicalize _CPU_Fatal_halt() Move _CPU_Fatal_halt() declaration to and make sure it is a proper declaration of a function which does not return. Fix the type of the error code. If necessary, add the implementation to cpu.c. Implementing _CPU_Fatal_halt() as a function makes it possible to wrap this function for example to fully test _Terminate(). --- cpukit/score/cpu/aarch64/cpu.c | 16 ++++++++++-- cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 13 ---------- .../cpu/aarch64/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/arm/cpu.c | 20 +++++++++++++-- cpukit/score/cpu/arm/include/rtems/score/cpu.h | 13 ---------- cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/bfin/cpu.c | 9 +++++++ cpukit/score/cpu/bfin/include/rtems/score/cpu.h | 23 ----------------- .../score/cpu/bfin/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/i386/include/rtems/score/cpu.h | 11 -------- .../score/cpu/i386/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/lm32/cpu.c | 13 ++++++++++ cpukit/score/cpu/lm32/include/rtems/score/cpu.h | 17 ------------- .../score/cpu/lm32/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/m68k/cpu.c | 24 ++++++++++++++++++ cpukit/score/cpu/m68k/include/rtems/score/cpu.h | 29 ---------------------- .../score/cpu/m68k/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/mips/cpu.c | 13 ++++++++++ cpukit/score/cpu/mips/include/rtems/score/cpu.h | 17 ------------- .../score/cpu/mips/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/moxie/cpu.c | 14 +++++++++++ cpukit/score/cpu/moxie/include/rtems/score/cpu.h | 17 ------------- .../score/cpu/moxie/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/nios2/include/rtems/score/cpu.h | 2 -- .../score/cpu/nios2/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/nios2/nios2-fatal-halt.c | 4 +-- cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h | 17 ------------- .../score/cpu/no_cpu/include/rtems/score/cpuimpl.h | 13 ++++++++++ cpukit/score/cpu/or1k/cpu.c | 18 +++++++++++++- cpukit/score/cpu/or1k/include/rtems/score/cpu.h | 17 ------------- .../score/cpu/or1k/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/powerpc/cpu.c | 14 +++++++++++ cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 14 ----------- .../cpu/powerpc/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/riscv/include/rtems/score/cpu.h | 2 -- .../score/cpu/riscv/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/sh/cpu.c | 9 ++++++- cpukit/score/cpu/sh/include/rtems/score/cpu.h | 26 ------------------- cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/sparc/include/rtems/score/cpu.h | 11 -------- .../score/cpu/sparc/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/sparc64/cpu.c | 10 ++++++++ cpukit/score/cpu/sparc64/include/rtems/score/cpu.h | 19 -------------- .../cpu/sparc64/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/v850/cpu.c | 8 ++++++ cpukit/score/cpu/v850/include/rtems/score/cpu.h | 20 --------------- .../score/cpu/v850/include/rtems/score/cpuimpl.h | 2 ++ cpukit/score/cpu/x86_64/cpu.c | 13 ++++++++++ cpukit/score/cpu/x86_64/include/rtems/score/cpu.h | 8 ------ .../score/cpu/x86_64/include/rtems/score/cpuimpl.h | 2 ++ 50 files changed, 224 insertions(+), 284 deletions(-) (limited to 'cpukit/score/cpu') diff --git a/cpukit/score/cpu/aarch64/cpu.c b/cpukit/score/cpu/aarch64/cpu.c index 75b1125cf7..d09403a349 100644 --- a/cpukit/score/cpu/aarch64/cpu.c +++ b/cpukit/score/cpu/aarch64/cpu.c @@ -38,8 +38,7 @@ #include "config.h" #endif -#include -#include +#include #include #include @@ -195,3 +194,16 @@ void _CPU_Initialize( void ) { /* Do nothing */ } + +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + __asm__ volatile ("mov x0, %0\n" + : "=r" (error) + : "0" (error) + : "x0" ); + while (1); +} diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h index 595f6c7351..dacc18638e 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpu.h @@ -295,19 +295,6 @@ void _CPU_Context_Initialize( *(*(_destination)) = _CPU_Null_fp_context; \ } while (0) -#define _CPU_Fatal_halt( _source, _err ) \ - do { \ - uint64_t _level; \ - uint32_t _error = _err; \ - _CPU_ISR_Disable( _level ); \ - (void) _level; \ - __asm__ volatile ("mov x0, %0\n" \ - : "=r" (_error) \ - : "0" (_error) \ - : "x0" ); \ - while (1); \ - } while (0); - /** * @brief CPU initialization. */ diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h index 4c3da6794a..0536ecd860 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h @@ -58,6 +58,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index 07b9588afd..d3471dc99f 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -26,8 +26,7 @@ #include "config.h" #endif -#include -#include +#include #include #include @@ -171,3 +170,20 @@ void _CPU_Initialize( void ) } #endif /* ARM_MULTILIB_ARCH_V4 */ + +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + __asm__ volatile ("mov r0, %0\n" + : "=r" (error) + : "0" (error) + : "r0" ); + + while ( true ) { + /* Do nothing */ + } +} diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h index b554aa263e..b8e3604fbb 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h @@ -434,19 +434,6 @@ void _CPU_Context_Initialize( *(*(_destination)) = _CPU_Null_fp_context; \ } while (0) -#define _CPU_Fatal_halt( _source, _err ) \ - do { \ - uint32_t _level; \ - uint32_t _error = _err; \ - _CPU_ISR_Disable( _level ); \ - (void) _level; \ - __asm__ volatile ("mov r0, %0\n" \ - : "=r" (_error) \ - : "0" (_error) \ - : "r0" ); \ - while (1); \ - } while (0); - /** * @brief CPU initialization. */ diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h index 2c7078b790..0f86710966 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h @@ -112,6 +112,8 @@ static inline struct Per_CPU_Control *_ARM_Get_current_per_CPU_control( void ) #endif /* ARM_MULTILIB_ARCH_V4 */ +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/bfin/cpu.c b/cpukit/score/cpu/bfin/cpu.c index 5a528894d8..962e84d1bc 100644 --- a/cpukit/score/cpu/bfin/cpu.c +++ b/cpukit/score/cpu/bfin/cpu.c @@ -18,6 +18,7 @@ #include "config.h" #endif +#include #include #include #include @@ -73,6 +74,14 @@ void _CPU_Initialize(void) __asm__ __volatile__ ("syscfg = %0" : : "d" (0x00000004)); } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + __asm__ volatile ( "cli R1; R1 = %0; _halt: idle; jump _halt;" + : : "r" (error) ); +} + +/* end of Fatal Error manager macros */ + diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h index b1063c9eee..91b1a91b07 100644 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h @@ -460,29 +460,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define _CPU_Fatal_halt( _source, _error ) \ - { \ - __asm__ volatile ( "cli R1; \ - R1 = %0; \ - _halt: \ - idle; \ - jump _halt;"\ - : : "r" (_error) ); \ - } - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h index 2140487fc3..1485abd365 100644 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h b/cpukit/score/cpu/i386/include/rtems/score/cpu.h index 813ed526d8..ba2fb8f396 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h @@ -479,19 +479,8 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* - * Fatal Error manager macros - * - * These macros perform the following functions: - * + disable interrupts and halt the CPU - */ - -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, uint32_t error ); - #endif /* ASM */ -/* end of Fatal Error manager macros */ - #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE /* diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h index 570b5cc167..6665059fef 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h @@ -37,6 +37,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c index cd2c4b055f..3301a3099b 100644 --- a/cpukit/score/cpu/lm32/cpu.c +++ b/cpukit/score/cpu/lm32/cpu.c @@ -20,6 +20,7 @@ #include "config.h" #endif +#include #include /* _CPU_Initialize @@ -45,6 +46,18 @@ void _CPU_Initialize(void) /* FP context initialization support goes here */ } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + while ( true ) { + /* Do nothing */ + } +} + uint32_t _CPU_ISR_Get_level( void ) { /* diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h index 29af53a53b..9bceb3b892 100644 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h @@ -590,23 +590,6 @@ extern char _gp[]; /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define _CPU_Fatal_halt( _source, _error ) \ - { \ - } - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h index ab43ddbf7d..eb0c058723 100644 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h @@ -34,6 +34,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c index be63351e9c..e6a5c9dbf3 100644 --- a/cpukit/score/cpu/m68k/cpu.c +++ b/cpukit/score/cpu/m68k/cpu.c @@ -17,6 +17,7 @@ #include "config.h" #endif +#include #include #include #include @@ -88,6 +89,29 @@ void _CPU_Initialize(void) m68k_install_interrupt_stack(); } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ +#if ( defined(__mcoldfire__) ) + __asm__ volatile( "move.w %%sr,%%d0\n\t" + "or.l %2,%%d0\n\t" + "move.w %%d0,%%sr\n\t" + "move.l %1,%%d0\n\t" + "move.l #0xDEADBEEF,%%d1\n\t" + "halt" + : "=g" (error) + : "0" (error), "d"(0x0700) + : "d0", "d1" ); + +#else + __asm__ volatile( "movl %0,%%d0; " + "orw #0x0700,%%sr; " + "stop #0x2700" : "=d" ((error)) : "0" ((error)) ); + +#endif + +/* end of Fatal Error manager macros */ +} + uint32_t _CPU_ISR_Get_level( void ) { uint32_t level; diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h index 65ba0ef496..95e75ad1eb 100644 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h @@ -401,35 +401,6 @@ void _CPU_Context_Initialize( void *_CPU_Thread_Idle_body( uintptr_t ignored ); -/* - * Fatal Error manager macros - * - * These macros perform the following functions: - * + disable interrupts and halt the CPU - */ - -#if ( defined(__mcoldfire__) ) -#define _CPU_Fatal_halt( _source, _error ) \ - { __asm__ volatile( "move.w %%sr,%%d0\n\t" \ - "or.l %2,%%d0\n\t" \ - "move.w %%d0,%%sr\n\t" \ - "move.l %1,%%d0\n\t" \ - "move.l #0xDEADBEEF,%%d1\n\t" \ - "halt" \ - : "=g" (_error) \ - : "0" (_error), "d"(0x0700) \ - : "d0", "d1" ); \ - } -#else -#define _CPU_Fatal_halt( _source, _error ) \ - { __asm__ volatile( "movl %0,%%d0; " \ - "orw #0x0700,%%sr; " \ - "stop #0x2700" : "=d" ((_error)) : "0" ((_error)) ); \ - } -#endif - -/* end of Fatal Error manager macros */ - #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE /* diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h index dda5727142..833ff071b8 100644 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index c8cf960db5..8d1018dbf6 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -50,6 +50,7 @@ #include "config.h" #endif +#include #include #if CPU_HARDWARE_FP @@ -93,6 +94,18 @@ void _CPU_Initialize(void) #endif } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + while ( true ) { + /* Do nothing */ + } +} + uint32_t _CPU_ISR_Get_level( void ) { unsigned int sr; diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h index cdb0e64013..67d1465daa 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h @@ -710,23 +710,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - */ - -#define _CPU_Fatal_halt( _source, _error ) \ - do { \ - unsigned int _level; \ - _CPU_ISR_Disable(_level); \ - (void)_level; \ - loop: goto loop; \ - } while (0) - - extern void mips_break( int error ); #define CPU_USE_GENERIC_BITFIELD_CODE TRUE diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h index 932784fc8f..554d8be1c8 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/moxie/cpu.c b/cpukit/score/cpu/moxie/cpu.c index 5522890c59..abebad9d29 100644 --- a/cpukit/score/cpu/moxie/cpu.c +++ b/cpukit/score/cpu/moxie/cpu.c @@ -17,7 +17,9 @@ #include "config.h" #endif +#include #include +#include /* _CPU_Initialize * @@ -37,6 +39,18 @@ void _CPU_Initialize(void) /* FP context initialization support goes here */ } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + while ( true ) { + /* Do nothing */ + } +} + /* * _CPU_ISR_Get_level * diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h index 9959892689..a3991016f1 100644 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/moxie/include/rtems/score/cpu.h @@ -391,23 +391,6 @@ uint32_t _CPU_ISR_Get_level( void ); /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * MOXIE Specific Information: - * - * XXX - */ -#define _CPU_Fatal_halt( _source, _error ) \ - printk("Fatal Error %d.%lu Halted\n",_source,_error); \ - for(;;) - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h index 9c81cb6193..76068fe8b8 100644 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h index 69c96280f4..c26e57f88b 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h @@ -290,8 +290,6 @@ void _CPU_Context_Initialize( #define _CPU_Context_Restart_self( _the_context ) \ _CPU_Context_restore( (_the_context) ); -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t _source, uint32_t _error ); - /** * @brief CPU initialization. */ diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h index e5f326eeb7..ad28960fe5 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/nios2/nios2-fatal-halt.c b/cpukit/score/cpu/nios2/nios2-fatal-halt.c index 40cae874c0..e2ea8ef13d 100644 --- a/cpukit/score/cpu/nios2/nios2-fatal-halt.c +++ b/cpukit/score/cpu/nios2/nios2-fatal-halt.c @@ -11,10 +11,10 @@ * http://www.rtems.org/license/LICENSE. */ -#include +#include #include -void _CPU_Fatal_halt( uint32_t _source, uint32_t _error ) +void _CPU_Fatal_halt( uint32_t _source, CPU_Uint32ptr _error ) { /* write 0 to status register (disable interrupts) */ __builtin_wrctl( NIOS2_CTLREG_INDEX_STATUS, 0 ); diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h index c4cb512e20..e224a5e56e 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h @@ -824,23 +824,6 @@ uint32_t _CPU_ISR_Get_level( void ); /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * Port Specific Information: - * - * XXX document implementation including references if appropriate - */ -#define _CPU_Fatal_halt( _source, _error ) \ - { \ - } - -/* end of Fatal Error manager macros */ - /* Bitfield handler macros */ /** diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index c8c86f4ec7..5f9196042c 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -83,6 +83,19 @@ register struct Per_CPU_Control *_CPU_Per_CPU_current asm( "rX" ); */ #define _CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing ) +/** + * This routine copies _error into a known place -- typically a stack + * location or a register, optionally disables interrupts, and + * halts/stops the CPU. + * + * Port Specific Information: + * + * XXX document implementation including references if appropriate + */ +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + +/* end of Fatal Error manager macros */ + /** * @addtogroup RTEMSScoreCPUExampleContext * diff --git a/cpukit/score/cpu/or1k/cpu.c b/cpukit/score/cpu/or1k/cpu.c index 79cb76812f..785fb2a084 100644 --- a/cpukit/score/cpu/or1k/cpu.c +++ b/cpukit/score/cpu/or1k/cpu.c @@ -11,8 +11,8 @@ * */ +#include #include -#include /* bsp_start_vector_table_begin is the start address of the vector table * containing addresses to ISR Handlers. It's defined at the BSP linkcmds @@ -28,6 +28,22 @@ void _CPU_Initialize(void) /* Do nothing */ } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + _OR1KSIM_CPU_Halt(); + + while ( true ) { + /* Do nothing */ + } +} + +/* end of Fatal Error manager macros */ + /** * @brief Sets the hardware interrupt level by the level value. * diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h index 5cd59df3f4..02a574affa 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h @@ -390,23 +390,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - */ - -#include - -#define _CPU_Fatal_halt(_source, _error ) \ - _OR1KSIM_CPU_Halt(); \ - for(;;) - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY TRUE diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h index 76da91fdec..ace9273da9 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c index 1367d9d2c0..41f1c202cc 100644 --- a/cpukit/score/cpu/powerpc/cpu.c +++ b/cpukit/score/cpu/powerpc/cpu.c @@ -325,3 +325,17 @@ RTEMS_STATIC_ASSERT( sizeof(CPU_Exception_frame) + FRAME_LINK_SPACE <= PPC_EXC_FRAME_SIZE, CPU_Exception_frame ); + +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ppc_interrupt_disable(); + __asm__ volatile ( + "mr 3, %0\n" + "mr 4, %1\n" + "1:\n" + "b 1b\n" + : \ + : "r" (source), "r" (error) + : "memory" + ); +} diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h index ee02bd4ee4..9cb47bcaa6 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h @@ -613,20 +613,6 @@ void ppc_set_interrupt_level( uint32_t level ); #endif /* ASM */ -#define _CPU_Fatal_halt( _source, _error ) \ - do { \ - ppc_interrupt_disable(); \ - __asm__ volatile ( \ - "mr 3, %0\n" \ - "mr 4, %1\n" \ - "1:\n" \ - "b 1b\n" \ - : \ - : "r" (_source), "r" (_error) \ - : "memory" \ - ); \ - } while ( 0 ) - /* * Should be large enough to run all RTEMS tests. This ensures * that a "reasonable" small application should not have any problems. diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h index bd23602827..69eeeb183c 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h @@ -248,6 +248,8 @@ static inline struct Per_CPU_Control *_PPC_Get_current_per_CPU_control( void ) #endif /* RTEMS_SMP */ +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h index 16dde8204c..3f3c8de74c 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h @@ -211,8 +211,6 @@ void _CPU_Context_Initialize( #define _CPU_Context_Restart_self( _the_context ) \ _CPU_Context_restore( (_the_context) ) -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, uint32_t error ); - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_GENERIC_BITFIELD_DATA TRUE diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h index c381cce110..eee6ad7328 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h @@ -408,6 +408,8 @@ static inline struct Per_CPU_Control *_RISCV_Get_current_per_CPU_control( void ) #endif /* RTEMS_SMP */ +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/sh/cpu.c b/cpukit/score/cpu/sh/cpu.c index c10086534b..558f95be4d 100644 --- a/cpukit/score/cpu/sh/cpu.c +++ b/cpukit/score/cpu/sh/cpu.c @@ -30,9 +30,9 @@ #include "config.h" #endif +#include #include #include -#include #include /* referenced in start.S */ @@ -76,6 +76,13 @@ void _CPU_Initialize(void) _CPU_ISR_Set_level( level ) ; } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + __asm__ volatile("mov.l %0,r0"::"m" (error)); + __asm__ volatile("mov #1, r4"); + __asm__ volatile("trapa #34"); +} + /* * _CPU_ISR_Get_level */ diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpu.h b/cpukit/score/cpu/sh/include/rtems/score/cpu.h index 364a2bc310..2805e4244c 100644 --- a/cpukit/score/cpu/sh/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sh/include/rtems/score/cpu.h @@ -490,32 +490,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * FIXME: Trap32 ??? - * - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * invokes a Trap32 Instruction which returns to the breakpoint - * routine of cmon. - */ - -#ifdef BSP_FATAL_HALT - /* we manage the fatal error in the board support package */ - void bsp_fatal_halt( uint32_t _error); -#define _CPU_Fatal_halt( _source, _error ) bsp_fatal_halt( _error) -#else -#define _CPU_Fatal_halt( _source, _error)\ -{ \ - __asm__ volatile("mov.l %0,r0"::"m" (_error)); \ - __asm__ volatile("mov #1, r4"); \ - __asm__ volatile("trapa #34"); \ -} -#endif - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h index 6dcbc00f6b..745a185d1a 100644 --- a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h index 910ec83a87..af15f35b62 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h @@ -883,17 +883,6 @@ void _CPU_Context_Initialize( do { } while ( 0 ) /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - */ -RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, uint32_t error ); - -/* end of Fatal Error manager macros */ - #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE /* Bitfield handler macros */ diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h index 8aa4030a45..14038cbdbe 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h @@ -199,6 +199,8 @@ register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__( "g6" ); #define _CPU_Get_thread_executing() ( _SPARC_Per_CPU_current->executing ) +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); diff --git a/cpukit/score/cpu/sparc64/cpu.c b/cpukit/score/cpu/sparc64/cpu.c index 2d92aa7286..e8d6017d2c 100644 --- a/cpukit/score/cpu/sparc64/cpu.c +++ b/cpukit/score/cpu/sparc64/cpu.c @@ -16,6 +16,7 @@ * http://www.rtems.org/license/LICENSE. */ +#include #include #include #include @@ -63,6 +64,15 @@ void _CPU_Initialize(void) _CPU_ISR_Dispatch_disable = 0; } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + uint32_t level; + + level = sparc_disable_interrupts(); + __asm__ volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); + while (1); /* loop forever */ +} + void _CPU_Context_Initialize( Context_Control *the_context, void *stack_base, diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h index 3c41a922e7..1d8813da35 100644 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpu.h @@ -769,25 +769,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - */ - -#define _CPU_Fatal_halt( _source, _error ) \ - do { \ - uint32_t level; \ - \ - level = sparc_disable_interrupts(); \ - __asm__ volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); \ - while (1); /* loop forever */ \ - } while (0) - -/* end of Fatal Error manager macros */ - #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE /* Bitfield handler macros */ diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h index e137756e62..521612d555 100644 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/v850/cpu.c b/cpukit/score/cpu/v850/cpu.c index a921775413..d659d9257e 100644 --- a/cpukit/score/cpu/v850/cpu.c +++ b/cpukit/score/cpu/v850/cpu.c @@ -17,6 +17,7 @@ #include "config.h" #endif +#include #include #include /* for memset */ @@ -30,6 +31,13 @@ void _CPU_Initialize(void) { } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + __asm__ __volatile__ ( "di" ); + __asm__ __volatile__ ( "mov %0, r10; " : "=r" ((error)) ); + __asm__ __volatile__ ( "halt" ); +} + /* * v850 Specific Information: * diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpu.h b/cpukit/score/cpu/v850/include/rtems/score/cpu.h index 1921216e2d..6bf69de3e6 100644 --- a/cpukit/score/cpu/v850/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/v850/include/rtems/score/cpu.h @@ -461,26 +461,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/** - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - * - * Port Specific Information: - * - * Move the error code into r10, disable interrupts and halt. - */ -#define _CPU_Fatal_halt( _source, _error ) \ - do { \ - __asm__ __volatile__ ( "di" ); \ - __asm__ __volatile__ ( "mov %0, r10; " : "=r" ((_error)) ); \ - __asm__ __volatile__ ( "halt" ); \ - } while (0) - -/* end of Fatal Error manager macros */ - #define CPU_USE_GENERIC_BITFIELD_CODE TRUE #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h index f7b02ccb6b..2e95738ed6 100644 --- a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h @@ -35,6 +35,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ diff --git a/cpukit/score/cpu/x86_64/cpu.c b/cpukit/score/cpu/x86_64/cpu.c index 6846c431ef..0ad2d1ff3c 100644 --- a/cpukit/score/cpu/x86_64/cpu.c +++ b/cpukit/score/cpu/x86_64/cpu.c @@ -37,6 +37,7 @@ #include "config.h" #endif +#include #include #include #include @@ -48,3 +49,15 @@ void _CPU_Exception_frame_print(const CPU_Exception_frame *ctx) void _CPU_Initialize(void) { } + +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + while ( true ) { + /* Do nothing */ + } +} diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h index 056c0224a9..bea8e05e39 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpu.h @@ -232,14 +232,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -#define _CPU_Fatal_halt( _source, _error ) \ - { \ - } - -/* end of Fatal Error manager macros */ - #define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE /* Bitfield handler macros */ diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h index 1730799952..d3a4b848e6 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h @@ -38,6 +38,8 @@ extern "C" { #endif +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) { /* TODO */ -- cgit v1.2.3