From 61d688bfcf191347af9b6a23f16176e6667d0bf5 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 4 Mar 2021 08:12:47 +0100 Subject: aarch64: Fix context switch The Per_CPU_Control::isr_dispatch_disable is a 32-bit integer. Close #4206. --- cpukit/score/cpu/aarch64/cpu_asm.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpukit/score/cpu') diff --git a/cpukit/score/cpu/aarch64/cpu_asm.S b/cpukit/score/cpu/aarch64/cpu_asm.S index 6c4da04628..9e609e06bd 100644 --- a/cpukit/score/cpu/aarch64/cpu_asm.S +++ b/cpukit/score/cpu/aarch64/cpu_asm.S @@ -64,7 +64,7 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch) /* Start saving context */ GET_SELF_CPU_CONTROL reg_2 - ldr x3, [x2, #PER_CPU_ISR_DISPATCH_DISABLE] + ldr w3, [x2, #PER_CPU_ISR_DISPATCH_DISABLE] stp x19, x20, [x0] stp x21, x22, [x0, #0x10] @@ -109,7 +109,7 @@ DEFINE_FUNCTION_AARCH64(_CPU_Context_switch) msr TPIDR_EL0, x3 - str x4, [x2, #PER_CPU_ISR_DISPATCH_DISABLE] + str w4, [x2, #PER_CPU_ISR_DISPATCH_DISABLE] ldp x19, x20, [x1] ldp x21, x22, [x1, #0x10] -- cgit v1.2.3