From 335e5caa9a9e0f28acf94fe4c2871017fcd71794 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 2 Jun 2015 21:43:54 +0200 Subject: score: Add Thread_Control::is_fp Store the floating-point unit property in the thread control block regardless of the CPU_HARDWARE_FP and CPU_SOFTWARE_FP settings. Make sure the floating-point unit is only enabled for the corresponding multilibs. This helps targets which have a volatile only floating point context like SPARC for example. --- cpukit/score/cpu/mips/cpu.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'cpukit/score/cpu') diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index fffee5e8d7..cb6c664f7a 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -179,6 +179,7 @@ void _CPU_Context_Initialize( { uintptr_t stack_tmp; __MIPS_REGISTER_TYPE intlvl = new_level & 0xff; + __MIPS_REGISTER_TYPE c0_sr; stack_tmp = (uintptr_t)stack_base; stack_tmp += ((size) - CPU_STACK_ALIGNMENT); @@ -187,11 +188,18 @@ void _CPU_Context_Initialize( the_context->sp = (__MIPS_REGISTER_TYPE) stack_tmp; the_context->fp = (__MIPS_REGISTER_TYPE) stack_tmp; the_context->ra = (__MIPS_REGISTER_TYPE) (uintptr_t)entry_point; - the_context->c0_sr = + + c0_sr = ((intlvl==0)? (mips_interrupt_mask() | 0x300 | _INTON): ( ((intlvl<<9) & mips_interrupt_mask()) | 0x300 | ((intlvl & 1)?_INTON:0)) ) | - SR_CU0 | ((is_fp)?SR_CU1:0) | _EXTRABITS; + SR_CU0 | _EXTRABITS; +#if MIPS_HAS_FPU == 1 + if ( is_fp ) { + c0_sr |= SR_CU1; + } +#endif + the_context->c0_sr = c0_sr; } /* * _CPU_Internal_threads_Idle_thread_body -- cgit v1.2.3