From 05d72d5e0963d866ba998b86e1af2d4f7e69ba82 Mon Sep 17 00:00:00 2001
From: Ralf Corsepius <ralf.corsepius@rtems.org>
Date: Fri, 11 Feb 2011 08:56:10 +0000
Subject: =?UTF-8?q?2011-02-11=09Ralf=20Cors=C3=A9pius=20<ralf.corsepius@rt?=
 =?UTF-8?q?ems.org>?=
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	* context.c, cpu.c, rtems/score/cpu.h, rtems/score/sh.h:
	Use "__asm__" instead of "asm" for improved c99-compliance.
---
 cpukit/score/cpu/sh/rtems/score/sh.h | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

(limited to 'cpukit/score/cpu/sh/rtems/score/sh.h')

diff --git a/cpukit/score/cpu/sh/rtems/score/sh.h b/cpukit/score/cpu/sh/rtems/score/sh.h
index 160dc60e8e..0cd7a5d926 100644
--- a/cpukit/score/cpu/sh/rtems/score/sh.h
+++ b/cpukit/score/cpu/sh/rtems/score/sh.h
@@ -104,14 +104,14 @@ extern "C" {
 #define SH_IRQDIS_VALUE 0xf0
 
 #define sh_disable_interrupts( _level ) \
-  asm volatile ( \
+  __asm__ volatile ( \
     "stc sr,%0\n\t" \
     "ldc %1,sr\n\t"\
   : "=&r" (_level ) \
   : "r" (SH_IRQDIS_VALUE) );
 
 #define sh_enable_interrupts( _level ) \
-  asm volatile( "ldc %0,sr\n\t" \
+  __asm__ volatile( "ldc %0,sr\n\t" \
     "nop\n\t" \
     :: "r" (_level) );
 
@@ -123,7 +123,7 @@ extern "C" {
  */
 
 #define sh_flash_interrupts( _level ) \
-  asm volatile( \
+  __asm__ volatile( \
     "ldc %1,sr\n\t" \
     "nop\n\t" \
     "ldc %0,sr\n\t" \
@@ -135,7 +135,7 @@ extern "C" {
 #define SH_IRQDIS_MASK 0xf0
 
 #define sh_disable_interrupts( _level ) \
-  asm volatile ( \
+  __asm__ volatile ( \
     "stc sr,%0\n\t" \
     "mov %0,r5\n\t" \
     "or %1,r5\n\t" \
@@ -145,7 +145,7 @@ extern "C" {
   : "r5" );
 
 #define sh_enable_interrupts( _level ) \
-  asm volatile( "ldc %0,sr\n\t" \
+  __asm__ volatile( "ldc %0,sr\n\t" \
     "nop\n\t" \
     :: "r" (_level) );
 
@@ -157,7 +157,7 @@ extern "C" {
  */
 
 #define sh_flash_interrupts( _level ) \
-  asm volatile( \
+  __asm__ volatile( \
     "stc sr,r5\n\t" \
     "ldc %1,sr\n\t" \
     "nop\n\t" \
@@ -172,7 +172,7 @@ extern "C" {
 { \
   register uint32_t   _tmpsr ; \
   \
-  asm volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
+  __asm__ volatile( "stc sr, %0" : "=r" (_tmpsr) ); \
   _level = (_tmpsr & 0xf0) >> 4 ; \
 }
 
@@ -180,9 +180,9 @@ extern "C" {
 { \
   register uint32_t   _tmpsr; \
   \
-  asm volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
+  __asm__ volatile ( "stc sr, %0" : "=r" (_tmpsr) ); \
   _tmpsr = ( _tmpsr & ~0xf0 ) | ((_newlevel) << 4) ; \
-  asm  volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
+  __asm__  volatile( "ldc %0,sr" :: "r" (_tmpsr) ); \
 }
 
 /*
@@ -196,7 +196,7 @@ static inline uint32_t sh_swap_u32(
 {
   register uint32_t swapped;
 
-  asm volatile (
+  __asm__ volatile (
     "swap.b %1,%0; "
     "swap.w %0,%0; "
     "swap.b %0,%0"
@@ -212,7 +212,7 @@ static inline uint16_t sh_swap_u16(
 {
   register uint16_t swapped ;
 
-  asm volatile ( "swap.b %1,%0" : "=r" (swapped) : "r"  (value) );
+  __asm__ volatile ( "swap.b %1,%0" : "=r" (swapped) : "r"  (value) );
 
   return( swapped );
 }
-- 
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