From 52f4fb65b3f5f8db68452e1d6fb218c125a8ce2b Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 26 Jun 2018 07:48:06 +0200 Subject: riscv: Format assembler files Use tabs to match the GCC generated assembler output. Update #3433. --- cpukit/score/cpu/riscv/riscv-context-switch.S | 186 +++++++++++++------------- 1 file changed, 93 insertions(+), 93 deletions(-) (limited to 'cpukit/score/cpu/riscv/riscv-context-switch.S') diff --git a/cpukit/score/cpu/riscv/riscv-context-switch.S b/cpukit/score/cpu/riscv/riscv-context-switch.S index 0b1a72c66f..448a5991a0 100644 --- a/cpukit/score/cpu/riscv/riscv-context-switch.S +++ b/cpukit/score/cpu/riscv/riscv-context-switch.S @@ -33,8 +33,8 @@ #include #include -.section .text, "ax" -.align 4 + .section .text, "ax", @progbits + .align 2 PUBLIC(_CPU_Context_switch) PUBLIC(_CPU_Context_restore) @@ -43,94 +43,94 @@ PUBLIC(_CPU_Context_save_fp) PUBLIC(restore) SYM(_CPU_Context_switch): - /* Disable interrupts and store all registers */ - csrr t0, mstatus - SREG t0, (32 * CPU_SIZEOF_POINTER)(a0) - - csrci mstatus, MSTATUS_MIE - - SREG x1, (1 * CPU_SIZEOF_POINTER)(a0) - SREG x2, (2 * CPU_SIZEOF_POINTER)(a0) - SREG x3, (3 * CPU_SIZEOF_POINTER)(a0) - SREG x4, (4 * CPU_SIZEOF_POINTER)(a0) - SREG x5, (5 * CPU_SIZEOF_POINTER)(a0) - SREG x6, (6 * CPU_SIZEOF_POINTER)(a0) - SREG x7, (7 * CPU_SIZEOF_POINTER)(a0) - SREG x8, (8 * CPU_SIZEOF_POINTER)(a0) - SREG x9, (9 * CPU_SIZEOF_POINTER)(a0) - SREG x10, (10 * CPU_SIZEOF_POINTER)(a0) - SREG x11, (11 * CPU_SIZEOF_POINTER)(a0) - SREG x12, (12 * CPU_SIZEOF_POINTER)(a0) - SREG x13, (13 * CPU_SIZEOF_POINTER)(a0) - SREG x14, (14 * CPU_SIZEOF_POINTER)(a0) - SREG x15, (15 * CPU_SIZEOF_POINTER)(a0) - SREG x16, (16 * CPU_SIZEOF_POINTER)(a0) - SREG x17, (17 * CPU_SIZEOF_POINTER)(a0) - SREG x18, (18 * CPU_SIZEOF_POINTER)(a0) - SREG x19, (19 * CPU_SIZEOF_POINTER)(a0) - SREG x20, (20 * CPU_SIZEOF_POINTER)(a0) - SREG x21, (21 * CPU_SIZEOF_POINTER)(a0) - SREG x22, (22 * CPU_SIZEOF_POINTER)(a0) - SREG x23, (23 * CPU_SIZEOF_POINTER)(a0) - SREG x24, (24 * CPU_SIZEOF_POINTER)(a0) - SREG x25, (25 * CPU_SIZEOF_POINTER)(a0) - SREG x26, (26 * CPU_SIZEOF_POINTER)(a0) - SREG x27, (27 * CPU_SIZEOF_POINTER)(a0) - SREG x28, (28 * CPU_SIZEOF_POINTER)(a0) - SREG x29, (28 * CPU_SIZEOF_POINTER)(a0) - SREG x30, (30 * CPU_SIZEOF_POINTER)(a0) - SREG x31, (31 * CPU_SIZEOF_POINTER)(a0) - - SYM(restore): - - LREG x1, (1 * CPU_SIZEOF_POINTER)(a1) - LREG x2, (2 * CPU_SIZEOF_POINTER)(a1) - LREG x3, (3 * CPU_SIZEOF_POINTER)(a1) - LREG x4, (4 * CPU_SIZEOF_POINTER)(a1) - LREG x5, (5 * CPU_SIZEOF_POINTER)(a1) - LREG x6, (6 * CPU_SIZEOF_POINTER)(a1) - LREG x7, (7 * CPU_SIZEOF_POINTER)(a1) - LREG x8, (8 * CPU_SIZEOF_POINTER)(a1) - LREG x9, (9 * CPU_SIZEOF_POINTER)(a1) - LREG x10, (10 * CPU_SIZEOF_POINTER)(a1) - /* Skip a1/x11 */ - LREG x12, (12 * CPU_SIZEOF_POINTER)(a1) - LREG x13, (13 * CPU_SIZEOF_POINTER)(a1) - LREG x14, (14 * CPU_SIZEOF_POINTER)(a1) - LREG x15, (15 * CPU_SIZEOF_POINTER)(a1) - LREG x16, (16 * CPU_SIZEOF_POINTER)(a1) - LREG x17, (17 * CPU_SIZEOF_POINTER)(a1) - LREG x18, (18 * CPU_SIZEOF_POINTER)(a1) - LREG x19, (19 * CPU_SIZEOF_POINTER)(a1) - LREG x20, (20 * CPU_SIZEOF_POINTER)(a1) - LREG x21, (21 * CPU_SIZEOF_POINTER)(a1) - LREG x22, (22 * CPU_SIZEOF_POINTER)(a1) - LREG x23, (23 * CPU_SIZEOF_POINTER)(a1) - LREG x24, (24 * CPU_SIZEOF_POINTER)(a1) - LREG x25, (25 * CPU_SIZEOF_POINTER)(a1) - LREG x26, (26 * CPU_SIZEOF_POINTER)(a1) - LREG x27, (27 * CPU_SIZEOF_POINTER)(a1) - LREG x28, (28 * CPU_SIZEOF_POINTER)(a1) - LREG x29, (29 * CPU_SIZEOF_POINTER)(a1) - LREG x30, (30 * CPU_SIZEOF_POINTER)(a1) - - /* Load mstatus */ - LREG x31, (32 * CPU_SIZEOF_POINTER)(a1) - csrw mstatus, x31 - - LREG x30, (30 * CPU_SIZEOF_POINTER)(a1) - - LREG x11, (11 * CPU_SIZEOF_POINTER)(a1) - - ret - - SYM(_CPU_Context_restore): - mv a1, a0 - j restore - - /* TODO no FP support for riscv32 yet */ - SYM(_CPU_Context_restore_fp): - nop - - SYM(_CPU_Context_save_fp): - nop + /* Disable interrupts and store all registers */ + csrr t0, mstatus + SREG t0, (32 * CPU_SIZEOF_POINTER)(a0) + + csrci mstatus, MSTATUS_MIE + + SREG x1, (1 * CPU_SIZEOF_POINTER)(a0) + SREG x2, (2 * CPU_SIZEOF_POINTER)(a0) + SREG x3, (3 * CPU_SIZEOF_POINTER)(a0) + SREG x4, (4 * CPU_SIZEOF_POINTER)(a0) + SREG x5, (5 * CPU_SIZEOF_POINTER)(a0) + SREG x6, (6 * CPU_SIZEOF_POINTER)(a0) + SREG x7, (7 * CPU_SIZEOF_POINTER)(a0) + SREG x8, (8 * CPU_SIZEOF_POINTER)(a0) + SREG x9, (9 * CPU_SIZEOF_POINTER)(a0) + SREG x10, (10 * CPU_SIZEOF_POINTER)(a0) + SREG x11, (11 * CPU_SIZEOF_POINTER)(a0) + SREG x12, (12 * CPU_SIZEOF_POINTER)(a0) + SREG x13, (13 * CPU_SIZEOF_POINTER)(a0) + SREG x14, (14 * CPU_SIZEOF_POINTER)(a0) + SREG x15, (15 * CPU_SIZEOF_POINTER)(a0) + SREG x16, (16 * CPU_SIZEOF_POINTER)(a0) + SREG x17, (17 * CPU_SIZEOF_POINTER)(a0) + SREG x18, (18 * CPU_SIZEOF_POINTER)(a0) + SREG x19, (19 * CPU_SIZEOF_POINTER)(a0) + SREG x20, (20 * CPU_SIZEOF_POINTER)(a0) + SREG x21, (21 * CPU_SIZEOF_POINTER)(a0) + SREG x22, (22 * CPU_SIZEOF_POINTER)(a0) + SREG x23, (23 * CPU_SIZEOF_POINTER)(a0) + SREG x24, (24 * CPU_SIZEOF_POINTER)(a0) + SREG x25, (25 * CPU_SIZEOF_POINTER)(a0) + SREG x26, (26 * CPU_SIZEOF_POINTER)(a0) + SREG x27, (27 * CPU_SIZEOF_POINTER)(a0) + SREG x28, (28 * CPU_SIZEOF_POINTER)(a0) + SREG x29, (28 * CPU_SIZEOF_POINTER)(a0) + SREG x30, (30 * CPU_SIZEOF_POINTER)(a0) + SREG x31, (31 * CPU_SIZEOF_POINTER)(a0) + + SYM(restore): + + LREG x1, (1 * CPU_SIZEOF_POINTER)(a1) + LREG x2, (2 * CPU_SIZEOF_POINTER)(a1) + LREG x3, (3 * CPU_SIZEOF_POINTER)(a1) + LREG x4, (4 * CPU_SIZEOF_POINTER)(a1) + LREG x5, (5 * CPU_SIZEOF_POINTER)(a1) + LREG x6, (6 * CPU_SIZEOF_POINTER)(a1) + LREG x7, (7 * CPU_SIZEOF_POINTER)(a1) + LREG x8, (8 * CPU_SIZEOF_POINTER)(a1) + LREG x9, (9 * CPU_SIZEOF_POINTER)(a1) + LREG x10, (10 * CPU_SIZEOF_POINTER)(a1) + /* Skip a1/x11 */ + LREG x12, (12 * CPU_SIZEOF_POINTER)(a1) + LREG x13, (13 * CPU_SIZEOF_POINTER)(a1) + LREG x14, (14 * CPU_SIZEOF_POINTER)(a1) + LREG x15, (15 * CPU_SIZEOF_POINTER)(a1) + LREG x16, (16 * CPU_SIZEOF_POINTER)(a1) + LREG x17, (17 * CPU_SIZEOF_POINTER)(a1) + LREG x18, (18 * CPU_SIZEOF_POINTER)(a1) + LREG x19, (19 * CPU_SIZEOF_POINTER)(a1) + LREG x20, (20 * CPU_SIZEOF_POINTER)(a1) + LREG x21, (21 * CPU_SIZEOF_POINTER)(a1) + LREG x22, (22 * CPU_SIZEOF_POINTER)(a1) + LREG x23, (23 * CPU_SIZEOF_POINTER)(a1) + LREG x24, (24 * CPU_SIZEOF_POINTER)(a1) + LREG x25, (25 * CPU_SIZEOF_POINTER)(a1) + LREG x26, (26 * CPU_SIZEOF_POINTER)(a1) + LREG x27, (27 * CPU_SIZEOF_POINTER)(a1) + LREG x28, (28 * CPU_SIZEOF_POINTER)(a1) + LREG x29, (29 * CPU_SIZEOF_POINTER)(a1) + LREG x30, (30 * CPU_SIZEOF_POINTER)(a1) + + /* Load mstatus */ + LREG x31, (32 * CPU_SIZEOF_POINTER)(a1) + csrw mstatus, x31 + + LREG x30, (30 * CPU_SIZEOF_POINTER)(a1) + + LREG x11, (11 * CPU_SIZEOF_POINTER)(a1) + + ret + + SYM(_CPU_Context_restore): + mv a1, a0 + j restore + + /* TODO no FP support for riscv32 yet */ + SYM(_CPU_Context_restore_fp): + nop + + SYM(_CPU_Context_save_fp): + nop -- cgit v1.2.3