From 5961b4c784d0c653953aa216afbd61d8c1acaaa6 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 16 Jan 2006 15:12:30 +0000 Subject: 2006-01-16 Joel Sherrill * rtems/new-exceptions/cpu.h, rtems/old-exceptions/cpu.h, rtems/score/cpu.h: Part of a large patch to improve Doxygen output. As a side-effect, grammar and spelling errors were corrected, spacing errors were address, and some variable names were improved. --- cpukit/score/cpu/powerpc/rtems/score/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpukit/score/cpu/powerpc/rtems/score/cpu.h') diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index f15fcad9b7..3739ccec63 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -299,7 +299,7 @@ typedef struct CPU_Interrupt_frame { #endif /* - * Should be large enough to run all RTEMS tests. This insures + * Should be large enough to run all RTEMS tests. This ensures * that a "reasonable" small application should not have any problems. */ @@ -365,7 +365,7 @@ typedef struct CPU_Interrupt_frame { * Some CPUs have special instructions which swap a 32-bit quantity in * a single instruction (e.g. i486). It is probably best to avoid * an "endian swapping control bit" in the CPU. One good reason is - * that interrupts would probably have to be disabled to insure that + * that interrupts would probably have to be disabled to ensure that * an interrupt does not try to access the same "chunk" with the wrong * endian. Another good reason is that on some CPUs, the endian bit * endianness for ALL fetches -- both code and data -- so the code -- cgit v1.2.3