From 84e6f15c828869eb7d293096cfcfa0563b5752b3 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 10 Nov 2016 12:02:28 +0100 Subject: score: Robust thread dispatch On SMP configurations, it is a fatal error to call blocking operating system with interrupts disabled, since this prevents delivery of inter-processor interrupts. This could lead to executing threads which are not allowed to execute resulting in undefined behaviour. The ARM Cortex-M port has a similar problem, since the interrupt state is not a part of the thread context. Update #2811. --- cpukit/score/cpu/no_cpu/rtems/score/cpu.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'cpukit/score/cpu/no_cpu/rtems/score') diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h index 9af357111e..58a024ef0c 100644 --- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h +++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h @@ -248,6 +248,18 @@ extern "C" { */ #define CPU_USE_DEFERRED_FP_SWITCH TRUE +/** + * @brief Enables a robust thread dispatch if set to TRUE. + * + * In general, it is an application bug to call blocking operating system + * services with interrupts disabled. In most situations this only increases + * the interrupt latency. However, on SMP configurations or on some CPU port + * like ARM Cortex-M it leads to undefined system behaviour. It order to ease + * the application development, this error condition is checked at run-time in + * case this CPU port option is defined to TRUE. + */ +#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE + /** * Does this port provide a CPU dependent IDLE task implementation? * -- cgit v1.2.3