From c8df844cf3bddde0221614843c97cb6c950cdba9 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 19 Jun 2018 14:59:51 +0200 Subject: score: Add CPU_INTERRUPT_STACK_ALIGNMENT Add CPU port define for the interrupt stack alignment. The alignment should take the stack ABI and the cache line size into account. Update #3459. --- cpukit/score/cpu/nios2/include/rtems/score/cpu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'cpukit/score/cpu/nios2') diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h index 1d088ed058..3cc56e591b 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpu.h @@ -87,6 +87,8 @@ extern "C" { */ #define CPU_STACK_ALIGNMENT 4 +#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES + /* * A Nios II configuration with an external interrupt controller (EIC) supports * up to 64 interrupt levels. A Nios II configuration with an internal -- cgit v1.2.3