From 797d88ba3179d84cb6f3fc35fd3e86092c12fef8 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 13 Dec 2000 22:12:06 +0000 Subject: 2000-12-13 Joel Sherrill * cpu.c: Removed duplicate declaration for _ISR_Vector_table. * cpu_asm.S: Removed assembly language to vector ISR handler on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No longer a constant -- get the real value from libcpu. --- cpukit/score/cpu/mips/ChangeLog | 8 +++ cpukit/score/cpu/mips/cpu.c | 2 - cpukit/score/cpu/mips/cpu_asm.S | 86 +++------------------------------ cpukit/score/cpu/mips/rtems/score/cpu.h | 2 +- 4 files changed, 16 insertions(+), 82 deletions(-) (limited to 'cpukit/score/cpu/mips') diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index aa674ac86e..d424e360c9 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,11 @@ +2000-12-13 Joel Sherrill + + * cpu.c: Removed duplicate declaration for _ISR_Vector_table. + * cpu_asm.S: Removed assembly language to vector ISR handler + on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. + * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No + longer a constant -- get the real value from libcpu. + 2000-12-13 Joel Sherrill * cpu_asm.h: Removed. diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index 22d66c95c0..ae5bf9f9ae 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -42,8 +42,6 @@ #include -ISR_Handler_entry _ISR_Vector_table[ ISR_NUMBER_OF_VECTORS ]; - /* _CPU_Initialize * * This routine performs processor dependent initialization. diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index b3cfd464f8..9509368dbd 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -792,9 +792,10 @@ _ISR_Handler_1: mfc0 k1,C0_SR and k0,k1 and k0,CAUSE_IPMASK - beq k0,zero,_ISR_Handler_exit /* external interrupt not enabled, ignore */ - /* but if it's not an exception or an interrupt, - /* Then where did it come from??? */ + beq k0,zero,_ISR_Handler_exit + /* external interrupt not enabled, ignore */ + /* but if it's not an exception or an interrupt, */ + /* Then where did it come from??? */ nop /* @@ -821,85 +822,12 @@ _ISR_Handler_1: sw t1,_Thread_Dispatch_disable_level /* - * while ( interrupts_pending(cause_reg) ) { - * vector = BITFIELD_TO_INDEX(cause_reg); - * (*_ISR_Vector_table[ vector ])( vector ); - * } + * Call the CPU model or BSP specific routine to decode the + * interrupt source and actually vector to device ISR handlers. */ - /* k0 has the SR interrupt bits */ - la t3, _ISR_Vector_table - - /* The bits you look at can be prioritized here just by */ - /* changing what bit is looked at. I.E. SR_IBITx */ - /* This code might become a loop, servicing all ints before returning.. */ - /* Right now, it will go thru the whole list once */ -_ISR_check_bit_0: - and k1, k0, SR_IBIT1 - beq k1, zero, _ISR_check_bit_1 - nop - li t1, ISR_VEC_SIZE*0 - add t3, t1 - jal t3 - nop -_ISR_check_bit_1: - and k1, k0, SR_IBIT2 - beq k1, zero, _ISR_check_bit_2 - nop - li t1, ISR_VEC_SIZE*1 - add t3, t1 - jal t3 - nop -_ISR_check_bit_2: - and k1, k0, SR_IBIT3 - beq k1, zero, _ISR_check_bit_3 - nop - li t1, ISR_VEC_SIZE*2 - add t3, t1 - jal t3 - nop -_ISR_check_bit_3: - and k1, k0, SR_IBIT4 - beq k1, zero, _ISR_check_bit_4 + jal mips_vector_isr_handlers nop - li t1, ISR_VEC_SIZE*3 - add t3, t1 - jal t3 - nop -_ISR_check_bit_4: - and k1, k0, SR_IBIT5 - beq k1, zero, _ISR_check_bit_5 - nop - li t1, ISR_VEC_SIZE*4 - add t3, t1 - jal t3 - nop -_ISR_check_bit_5: - and k1, k0, SR_IBIT6 - beq k1, zero, _ISR_check_bit_6 - nop - li t1, ISR_VEC_SIZE*5 - add t3, t1 - jal t3 - nop -_ISR_check_bit_6: - and k1, k0, SR_IBIT7 - beq k1, zero, _ISR_check_bit_7 - nop - li t1, ISR_VEC_SIZE*6 - add t3, t1 - jal t3 - nop -_ISR_check_bit_7: - and k1, k0, SR_IBIT8 - beq k1, zero, _ISR_exit_int_check - nop - li t1, ISR_VEC_SIZE*7 - add t3, t1 - jal t3 - nop - -_ISR_exit_int_check: /* * --_ISR_Nest_level; diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index 5d5a9a2754..5ec59763a8 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -526,7 +526,7 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ extern unsigned int mips_interrupt_number_of_vectors; -#define CPU_INTERRUPT_NUMBER_OF_VECTORS 8 +#define CPU_INTERRUPT_NUMBER_OF_VECTORS (mips_interrupt_number_of_vectors) #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) /* -- cgit v1.2.3