From 0f98487daef390e1fb04950fec194a2b94de0376 Mon Sep 17 00:00:00 2001 From: Jennifer Averett Date: Fri, 9 Dec 2011 14:04:37 +0000 Subject: 2011-12-09 Jennifer Averett * cpu.c: Correct typo. --- cpukit/score/cpu/mips/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpukit/score/cpu/mips/cpu.c') diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index c4b8dce4a7..4e41c91013 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -195,7 +195,7 @@ void _CPU_ISR_install_raw_handler( * table used by the CPU to dispatch interrupt handlers. * * Because all interrupts are vectored through the same exception handler - * this is not necessary on thi sport. + * this is not necessary on this port. */ } -- cgit v1.2.3