From 5d7bfce333f0ef42400e9970adb3b144eb73bbc0 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 6 Dec 2000 15:32:40 +0000 Subject: 2000-12-06 Joel Sherrill * rtems/score/cpu.h: When mips ISA level is 1, registers in the context should be 32 not 64 bits. --- cpukit/score/cpu/mips/ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpukit/score/cpu/mips/ChangeLog') diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 9edafc7635..84248074af 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,8 @@ +2000-12-06 Joel Sherrill + + * rtems/score/cpu.h: When mips ISA level is 1, registers in the + context should be 32 not 64 bits. + 2000-11-30 Joel Sherrill * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to -- cgit v1.2.3