From 176e1ed8aa32d46f18a40a8f90f2c43e7dcec434 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 20 Apr 2001 13:07:34 +0000 Subject: 2001-04-20 Joel Sherrill * cpu_asm.S: Added code to save and restore SR and EPC to properly support nested interrupts. Note that the ISR (not RTEMS) enables interrupts allowing the nesting to occur. --- cpukit/score/cpu/mips/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'cpukit/score/cpu/mips/ChangeLog') diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index 03daf07e5e..c299901989 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,9 @@ +2001-04-20 Joel Sherrill + + * cpu_asm.S: Added code to save and restore SR and EPC to + properly support nested interrupts. Note that the ISR + (not RTEMS) enables interrupts allowing the nesting to occur. + 2001-03-14 Joel Sherrill * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h: -- cgit v1.2.3