From 022851aba54d32831feaff13deb3d9943e130eee Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 28 Jan 2014 12:10:08 +0100 Subject: Add thread-local storage (TLS) support Tested and implemented on ARM, m68k, PowerPC and SPARC. Other architectures need more work. --- cpukit/score/cpu/lm32/rtems/score/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpukit/score/cpu/lm32/rtems/score/cpu.h') diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h index 95553efa48..4699c1a226 100644 --- a/cpukit/score/cpu/lm32/rtems/score/cpu.h +++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h @@ -823,7 +823,7 @@ uint32_t _CPU_ISR_Get_level( void ); extern char _gp[]; #define _CPU_Context_Initialize( _the_context, _stack_base, _size, \ - _isr, _entry_point, _is_fp ) \ + _isr, _entry_point, _is_fp, _tls_area ) \ do { \ uint32_t _stack = (uint32_t)(_stack_base) + (_size) - 4; \ (_the_context)->gp = (uint32_t)_gp; \ -- cgit v1.2.3