From 7c4c284c4af4551627097f914ce048245213c481 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 14 Apr 2009 13:44:29 +0000 Subject: 2009-04-14 Michael Walle * cpu.h: corrected the registers in Context_Control and in CPU_Interrupt_frame to correspond to the saved frame in cpu_asm.S Also switched on CPU_ISR_PASSES_FRAME_POINTER. * cpu_asm.S: Moved the restore part of _CPU_Context_switch for easier reading. Fixed _CPU_Context_restore, it now moves the argument and branches to a label in _CPU_Context_switch. Removed unnecessary saves of registers in context switch and irq handling. Rewrote irq code to call the C helper. Added some documentation * irq.c: New file derived from c4x and nios2. --- cpukit/score/cpu/lm32/irq.c | 83 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 cpukit/score/cpu/lm32/irq.c (limited to 'cpukit/score/cpu/lm32/irq.c') diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c new file mode 100644 index 0000000000..3eb723d3d8 --- /dev/null +++ b/cpukit/score/cpu/lm32/irq.c @@ -0,0 +1,83 @@ +/* + * lm32 interrupt handler + * + * Derived from c4x/irq.c and nios2/irq.c + * + * COPYRIGHT (c) 1989-2009. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#include +#include +#include +#include + +/* + * This routine provides the RTEMS interrupt management. + * + * Upon entry, interrupts are disabled + */ + +#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + unsigned long *_old_stack_ptr; +#endif + +register unsigned long *stack_ptr asm("sp"); + +void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr) +{ + register uint32_t level; + + /* Interrupts are disabled upon entry to this Handler */ + + _Thread_Dispatch_disable_level++; + +#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + if ( _ISR_Nest_level == 0 ) { + /* Install irq stack */ + _old_stack_ptr = stack_ptr; + stack_ptr = _CPU_Interrupt_stack_high - 4; + } +#endif + + _ISR_Nest_level++; + + if ( _ISR_Vector_table[ vector] ) + { + (*_ISR_Vector_table[ vector ])(vector, ifr); + }; + + /* Make sure that interrupts are disabled again */ + _CPU_ISR_Disable( level ); + + _ISR_Nest_level--; + +#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + if( _ISR_Nest_level == 0) + stack_ptr = _old_stack_ptr; +#endif + + _Thread_Dispatch_disable_level--; + + _CPU_ISR_Enable( level ); + + if ( _ISR_Nest_level ) + return; + + if ( _Thread_Dispatch_disable_level ) { + _ISR_Signals_to_thread_executing = FALSE; + return; + } + + if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) { + _ISR_Signals_to_thread_executing = FALSE; + _Thread_Dispatch(); + } +} + -- cgit v1.2.3