From 5bb38e15667c03ef44420cdeb7889db42649ece3 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Fri, 4 Dec 2009 05:25:30 +0000 Subject: Whitespace removal. --- cpukit/score/cpu/h8300/cpu.c | 4 ++-- cpukit/score/cpu/h8300/cpu_asm.S | 16 ++++++++-------- cpukit/score/cpu/h8300/rtems/asm.h | 6 +++--- cpukit/score/cpu/h8300/rtems/score/cpu.h | 26 +++++++++++++------------- cpukit/score/cpu/h8300/rtems/score/h8300.h | 2 +- 5 files changed, 27 insertions(+), 27 deletions(-) (limited to 'cpukit/score/cpu/h8300') diff --git a/cpukit/score/cpu/h8300/cpu.c b/cpukit/score/cpu/h8300/cpu.c index 4d97aebb07..c11b318797 100644 --- a/cpukit/score/cpu/h8300/cpu.c +++ b/cpukit/score/cpu/h8300/cpu.c @@ -41,7 +41,7 @@ void _CPU_Initialize(void) * * This routine returns the current interrupt level. */ - + uint32_t _CPU_ISR_Get_level( void ) { unsigned int _ccr; @@ -61,7 +61,7 @@ uint32_t _CPU_ISR_Get_level( void ) * * _CPU_ISR_install_raw_handler */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, diff --git a/cpukit/score/cpu/h8300/cpu_asm.S b/cpukit/score/cpu/h8300/cpu_asm.S index 0869d8100a..4cba8de7a9 100644 --- a/cpukit/score/cpu/h8300/cpu_asm.S +++ b/cpukit/score/cpu/h8300/cpu_asm.S @@ -3,14 +3,14 @@ * Copyright Comnet Technologies Ltd 1999 * * Based on example code and other ports with this copyright: - * + * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ @@ -18,18 +18,18 @@ ;.equ RUNCONTEXT_ARG, er0 ;.equ HEIRCONTEXT_ARG, er1 -/* +/* * Make sure we tell the assembler what type of CPU model we are * being compiled for. - */ + */ #if defined(__H8300H__) .h8300h #endif -#if defined(__H8300S__) +#if defined(__H8300S__) .h8300s #endif -#if defined(__H8300SX__) +#if defined(__H8300SX__) .h8300sx #endif .text @@ -121,7 +121,7 @@ __ISR_Handler: nested: mov.l er6,@-er7 ; save sp so pop regardless of nest level -;; Inc system counters +;; Inc system counters mov.l @__ISR_Nest_level,er1 inc.l #1,er1 mov.l er1,@__ISR_Nest_level diff --git a/cpukit/score/cpu/h8300/rtems/asm.h b/cpukit/score/cpu/h8300/rtems/asm.h index da3b80aeb7..f45c519b45 100644 --- a/cpukit/score/cpu/h8300/rtems/asm.h +++ b/cpukit/score/cpu/h8300/rtems/asm.h @@ -19,14 +19,14 @@ * notice. This file is freely distributable as long as the source * of the file is noted. This file is: * - * + * * COPYRIGHT (c) 1989-1999. * On-Line Applications Research Corporation (OAR). - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/cpukit/score/cpu/h8300/rtems/score/cpu.h b/cpukit/score/cpu/h8300/rtems/score/cpu.h index df98aee925..f684e0e5f1 100644 --- a/cpukit/score/cpu/h8300/rtems/score/cpu.h +++ b/cpukit/score/cpu/h8300/rtems/score/cpu.h @@ -274,7 +274,7 @@ extern "C" { * H8300 Specific Information: * * XXX - * The port initially called a BSP dependent routine called + * The port initially called a BSP dependent routine called * IDLE_Monitor. The idle task body can be overridden by * the BSP in newer versions of RTEMS. */ @@ -484,7 +484,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * It is highly unlikely the H8300 will get used in a multiprocessor system. */ -#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 +#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 /* * This defines the number of entries in the ISR_Vector_table managed @@ -642,7 +642,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; * * H8300 Specific Information: * - * XXX + * XXX */ #if defined(__H8300H__) || defined(__H8300S__) @@ -652,7 +652,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; asm volatile( "stc ccr, %0 ; orc #0x80,ccr " \ : "=m" (__ccr) /* : "0" (__ccr) */ ); \ (_isr_cookie) = __ccr; \ - } while (0) + } while (0) #else #define _CPU_ISR_Disable( _isr_cookie ) (_isr_cookie) = 0 #endif @@ -673,7 +673,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; do { \ unsigned char __ccr = (unsigned char) (_isr_cookie); \ asm volatile( "ldc %0, ccr" : : "m" (__ccr) ); \ - } while (0) + } while (0) #else #define _CPU_ISR_Enable( _isr_cookie ) #endif @@ -694,7 +694,7 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; do { \ unsigned char __ccr = (unsigned char) (_isr_cookie); \ asm volatile( "ldc %0, ccr ; orc #0x80,ccr " : : "m" (__ccr) ); \ - } while (0) + } while (0) #else #define _CPU_ISR_Flash( _isr_cookie ) #endif @@ -852,8 +852,8 @@ uint32_t _CPU_ISR_Get_level( void ); #define _CPU_Fatal_halt( _error ) \ printk("Fatal Error %d Halted\n",_error); \ - for(;;) - + for(;;) + /* end of Fatal Error manager macros */ @@ -986,14 +986,14 @@ void _CPU_Initialize(void); /* * _CPU_ISR_install_raw_handler * - * This routine installs a "raw" interrupt handler directly into the + * This routine installs a "raw" interrupt handler directly into the * processor's vector table. * * H8300 Specific Information: * * XXX */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, @@ -1129,18 +1129,18 @@ void _CPU_Context_restore_fp( * * This is the generic implementation. */ - + static inline uint32_t CPU_swap_u32( uint32_t value ) { uint32_t byte1, byte2, byte3, byte4, swapped; - + byte4 = (value >> 24) & 0xff; byte3 = (value >> 16) & 0xff; byte2 = (value >> 8) & 0xff; byte1 = value & 0xff; - + swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; return( swapped ); } diff --git a/cpukit/score/cpu/h8300/rtems/score/h8300.h b/cpukit/score/cpu/h8300/rtems/score/h8300.h index 4abb36bbb2..5a2444b081 100644 --- a/cpukit/score/cpu/h8300/rtems/score/h8300.h +++ b/cpukit/score/cpu/h8300/rtems/score/h8300.h @@ -40,4 +40,4 @@ extern "C" { } #endif -#endif +#endif -- cgit v1.2.3