From 008171099d817f4745ab55a68121d5dba7b66181 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 31 May 2007 16:55:37 +0000 Subject: 2007-05-31 Alain Schaefer * rtems/score/cpu.h: Modifiy inline assembly language constraints to use a data register as the CTL/STI instructions requires. This is not only more correct, it avoids GCC PR31787. --- cpukit/score/cpu/bfin/rtems/score/cpu.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'cpukit/score/cpu/bfin/rtems') diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index db3ff20617..0d4bbeb5b7 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -846,8 +846,8 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); */ #define _CPU_ISR_Disable( _level ) \ { \ - asm volatile ("cli %0 \n" \ - : "=r" (_level) ); \ + asm volatile ("cli %0 \n" \ + : "=d" (_level) ); \ \ } @@ -865,9 +865,9 @@ SCORE_EXTERN void (*_CPU_Thread_dispatch_pointer)(); * XXX document implementation including references if appropriate */ #define _CPU_ISR_Enable( _level ) \ - { \ - asm volatile ("STI %0" \ - : : "r" (_level) ); \ + { \ + asm volatile ("STI %0 \n" \ + : : "d" (_level) ); \ } /** -- cgit v1.2.3