From ca11004d24066361a7f774e075fbcec37df0ef19 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 20 Apr 2011 20:19:08 +0000 Subject: 2011-04-20 Rohan Kangralkar PR 1781/bsps * bfin/rtems/bf52x.h: This file defines basic MMR for the Blackfin 52x CPU. The MMR have been taken from the ADSP-BF52x Blackfin Processor Hardware Reference from Analog Devices. Mentioned Chapters refer to this Documentation. --- cpukit/score/cpu/bfin/rtems/score/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpukit/score/cpu/bfin/rtems/score') diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h index 9974212018..8578daf14b 100644 --- a/cpukit/score/cpu/bfin/rtems/score/cpu.h +++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h @@ -613,7 +613,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context; * * XXX document implementation including references if appropriate */ -#define CPU_STACK_MINIMUM_SIZE (1024*4) +#define CPU_STACK_MINIMUM_SIZE (1024*8) /** * CPU's worst alignment requirement for data types on a byte boundary. This @@ -681,7 +681,7 @@ SCORE_EXTERN Context_Control_fp _CPU_Null_fp_context; * * XXX document implementation including references if appropriate */ -#define CPU_STACK_ALIGNMENT 0 +#define CPU_STACK_ALIGNMENT 8 /* * ISR handler macros -- cgit v1.2.3