From e7b878e42f0c358379206c025059feccd711804e Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 2 Oct 2020 11:36:20 +0200 Subject: bsps/arm: Workaround for Errata 845369 Add a workaround for Cortex-A9 Errata 845369: Under Very Rare Timing Circumstances Transition into Streaming Mode Might Create Data Corruption. Update #4115. --- cpukit/score/cpu/arm/include/libcpu/arm-cp15.h | 32 ++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'cpukit/score/cpu/arm') diff --git a/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h b/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h index 6097d60ba6..5bc01dcb32 100644 --- a/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h +++ b/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h @@ -2308,6 +2308,38 @@ arm_cp15_set_counter_virtual_offset(uint64_t val) ); } +/* Diagnostic Control Register */ +ARM_CP15_TEXT_SECTION static inline uint32_t +arm_cp15_get_diagnostic_control(void) +{ + ARM_SWITCH_REGISTERS; + uint32_t val; + + __asm__ volatile ( + ARM_SWITCH_TO_ARM + "mrc p15, 0, %[val], c15, c0, 1\n" + ARM_SWITCH_BACK + : [val] "=&r" (val) ARM_SWITCH_ADDITIONAL_OUTPUT + ); + + return val; +} + +/* Diagnostic Control Register */ +ARM_CP15_TEXT_SECTION static inline void +arm_cp15_set_diagnostic_control(uint32_t val) +{ + ARM_SWITCH_REGISTERS; + + __asm__ volatile ( + ARM_SWITCH_TO_ARM + "mcr p15, 0, %[val], c15, c0, 1\n" + ARM_SWITCH_BACK + : ARM_SWITCH_OUTPUT + : [val] "r" (val) + ); +} + /** * @brief Sets the @a section_flags for the address range [@a begin, @a end). * -- cgit v1.2.3