From 022851aba54d32831feaff13deb3d9943e130eee Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Tue, 28 Jan 2014 12:10:08 +0100
Subject: Add thread-local storage (TLS) support

Tested and implemented on ARM, m68k, PowerPC and SPARC.  Other
architectures need more work.
---
 cpukit/score/cpu/arm/cpu.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

(limited to 'cpukit/score/cpu/arm/cpu.c')

diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 1c1fe5d3de..c3f071df55 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -32,6 +32,7 @@
 #include <rtems/score/isr.h>
 #include <rtems/score/wkspace.h>
 #include <rtems/score/thread.h>
+#include <rtems/score/tls.h>
 #include <rtems/score/cpu.h>
 
 #ifdef ARM_MULTILIB_VFP_D32
@@ -41,6 +42,14 @@
   );
 #endif
 
+#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
+  RTEMS_STATIC_ASSERT(
+    offsetof( Context_Control, thread_id )
+      == ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET,
+    ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET
+  );
+#endif
+
 RTEMS_STATIC_ASSERT(
   sizeof( CPU_Exception_frame ) == ARM_EXCEPTION_FRAME_SIZE,
   ARM_EXCEPTION_FRAME_SIZE
@@ -71,13 +80,22 @@ void _CPU_Context_Initialize(
   size_t stack_area_size,
   uint32_t new_level,
   void (*entry_point)( void ),
-  bool is_fp
+  bool is_fp,
+  void *tls_area
 )
 {
   the_context->register_sp = (uint32_t) stack_area_begin + stack_area_size;
   the_context->register_lr = (uint32_t) entry_point;
   the_context->register_cpsr = ( ( new_level != 0 ) ? ARM_PSR_I : 0 )
     | arm_cpu_mode;
+
+#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
+  the_context->thread_id = (uint32_t) tls_area;
+#endif
+
+  if ( tls_area != NULL ) {
+    _TLS_TCB_at_area_begin_initialize( tls_area );
+  }
 }
 
 /* Preprocessor magic for stringification of x */
-- 
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