From c5ed14844e379eaefaf6cfe27f54d9f17f8984e1 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Sat, 24 Sep 2011 12:56:51 +0000 Subject: 2011-09-24 Sebastian Huber * rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files. * Makefile.am, preinstall.am: Reflect changes above. * rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M. * rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M. --- cpukit/score/cpu/arm/armv7m-context-restore.c | 45 +++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 cpukit/score/cpu/arm/armv7m-context-restore.c (limited to 'cpukit/score/cpu/arm/armv7m-context-restore.c') diff --git a/cpukit/score/cpu/arm/armv7m-context-restore.c b/cpukit/score/cpu/arm/armv7m-context-restore.c new file mode 100644 index 0000000000..effa3e704e --- /dev/null +++ b/cpukit/score/cpu/arm/armv7m-context-restore.c @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2011 Sebastian Huber. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifdef HAVE_CONFIG_H + #include "config.h" +#endif + +#include + +#ifdef ARM_MULTILIB_ARCH_V7M + +#include + +void __attribute__((naked)) _CPU_Context_restore( + Context_Control *heir +) +{ + __asm__ volatile ( + "movw r2, #:lower16:_Per_CPU_Information\n" + "movt r2, #:upper16:_Per_CPU_Information\n" + "ldr r3, [r0, %[isrctxoff]]\n" + "ldr sp, [r0, %[spctxoff]]\n" + "ldm r0, {r4-r11, lr}\n" + "str r3, [r2, %[isrpcpuoff]]\n" + "bx lr\n" + : + : [spctxoff] "J" (offsetof(Context_Control, register_sp)), + [isrctxoff] "J" (offsetof(Context_Control, isr_nest_level)), + [isrpcpuoff] "J" (offsetof(Per_CPU_Control, isr_nest_level)) + ); + __builtin_unreachable(); +} + +#endif /* ARM_MULTILIB_ARCH_V7M */ -- cgit v1.2.3