From 7d52750d9c23fdd1b4f358b549c2bcf7fc8418a4 Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Tue, 13 Jun 2000 22:14:16 +0000
Subject: New file.

---
 cpukit/rtems/include/rtems/rtems/cache.h | 137 +++++++++++++++++++++++++++++++
 1 file changed, 137 insertions(+)
 create mode 100644 cpukit/rtems/include/rtems/rtems/cache.h

(limited to 'cpukit/rtems')

diff --git a/cpukit/rtems/include/rtems/rtems/cache.h b/cpukit/rtems/include/rtems/rtems/cache.h
new file mode 100644
index 0000000000..7cfd362fd9
--- /dev/null
+++ b/cpukit/rtems/include/rtems/rtems/cache.h
@@ -0,0 +1,137 @@
+/*  cache.h
+ *
+ *  Cache Manager
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *
+ *  The functions in this file define the API to the RTEMS Cache Manager and
+ *  are divided into data cache and instruction cache functions. Data cache
+ *  functions are only meaningful if a data cache is supported. Instruction
+ *  cache functions are only meaningful if an instruction cache is supported.
+ *  
+ *  The functions below are implemented with CPU dependent support routines
+ *  implemented as part of libcpu. In the event that a CPU does not support a
+ *  specific function, the CPU dependent routine does nothing (but does exist).
+ *  
+ *  At this point, the Cache Manager makes no considerations, and provides no
+ *  support for BSP specific issues such as a secondary cache. In such a system,
+ *  the CPU dependent routines would have to be modified, or a BSP layer added
+ *  to this Manager.
+ */
+
+#ifndef __CACHE_h
+#define __CACHE_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems/system.h>
+#include <sys/types.h>
+
+/*
+ *  These functions will ONLY do something if the
+ *  libcpu support includes data cache routines AND
+ *  the CPU model supports data caching.
+ */
+
+/*
+ * This function is called to flush the data cache by performing cache
+ * copybacks. It must determine how many cache lines need to be copied
+ * back and then perform the copybacks.
+ */
+void rtems_flush_multiple_data_cache_lines( const void *, size_t );
+
+/*
+ * This function is responsible for performing a data cache invalidate.
+ * It must determine how many cache lines need to be invalidated and then
+ * perform the invalidations.
+ */
+void rtems_invalidate_multiple_data_cache_lines( const void *, size_t );
+
+/*
+ * This function is responsible for performing a data cache flush.
+ * It flushes the entire cache.
+ */
+void rtems_flush_entire_data_cache( void );
+
+/*
+ * This function is responsible for performing a data cache
+ * invalidate. It invalidates the entire cache.
+ */
+void rtems_invalidate_entire_data_cache( void );
+
+/*
+ * This function returns the data cache granularity.
+ */
+int rtems_get_data_cache_line_size( void );
+
+/*
+ * This function freezes the data cache.
+ */
+void rtems_freeze_data_cache( void );
+
+/*
+ * This function unfreezes the data cache.
+ */
+void rtems_unfreeze_data_cache( void );
+
+/*
+ * These functions enable/disable the data cache.
+ */
+void rtems_enable_data_cache( void );
+void rtems_disable_data_cache( void );
+
+/*
+ *  These functions will ONLY do something if the
+ *  libcpu support includes instruction cache routines AND
+ *  the CPU model supports instruction caching.
+ */
+
+/*
+ * This function is responsible for performing an instruction cache
+ * invalidate. It must determine how many cache lines need to be invalidated
+ * and then perform the invalidations.
+ */
+void rtems_invalidate_multiple_inst_cache_lines( const void *, size_t );
+
+/*
+ * This function is responsible for performing an instruction cache
+ * invalidate. It invalidates the entire cache.
+ */
+void rtems_invalidate_entire_inst_cache( void );
+
+/*
+ * This function returns the instruction cache granularity.
+ */
+int rtems_get_inst_cache_line_size( void );
+
+/*
+ * This function freezes the instruction cache.
+ */
+void rtems_freeze_inst_cache( void );
+
+/*
+ * This function unfreezes the instruction cache.
+ */
+void rtems_unfreeze_inst_cache( void );
+
+/*
+ * These functions enable/disable the instruction cache.
+ */
+void rtems_enable_inst_cache( void );
+void rtems_disable_inst_cache( void );
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
-- 
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