From 7f93f772d805569652938c15d8c7caa30e3da89f Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 16 Nov 1999 13:37:49 +0000 Subject: Committed modifications from ITRON Task and Task Dependendent Synchronization Working Group. Included are tests. --- c/src/lib/start/a29k/Makefile.in | 64 ----- c/src/lib/start/a29k/amd.ah | 517 -------------------------------------- c/src/lib/start/a29k/configure.in | 35 --- c/src/lib/start/a29k/crt0.S | 288 --------------------- c/src/lib/start/a29k/pswmacro.ah | 442 -------------------------------- c/src/lib/start/a29k/register.S | 393 ----------------------------- c/src/lib/start/a29k/register.ah | 214 ---------------- 7 files changed, 1953 deletions(-) delete mode 100644 c/src/lib/start/a29k/Makefile.in delete mode 100644 c/src/lib/start/a29k/amd.ah delete mode 100644 c/src/lib/start/a29k/configure.in delete mode 100644 c/src/lib/start/a29k/crt0.S delete mode 100644 c/src/lib/start/a29k/pswmacro.ah delete mode 100644 c/src/lib/start/a29k/register.S delete mode 100644 c/src/lib/start/a29k/register.ah (limited to 'c') diff --git a/c/src/lib/start/a29k/Makefile.in b/c/src/lib/start/a29k/Makefile.in deleted file mode 100644 index 62872dd8f6..0000000000 --- a/c/src/lib/start/a29k/Makefile.in +++ /dev/null @@ -1,64 +0,0 @@ -# -# $Id$ -# - -@SET_MAKE@ -srcdir = @srcdir@ -top_srcdir = @top_srcdir@ -top_builddir = . - -RTEMS_ROOT = @RTEMS_ROOT@ -PROJECT_ROOT = @PROJECT_ROOT@ - -VPATH = @srcdir@ - -# C source names, if any, go here -- minus the .c -C_PIECES = -C_FILES = $(C_PIECES:%=%.c) -C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) - -H_FILES = - -# Assembly source names, if any, go here -- minus the .S -S_PIECES = crt0 register -S_FILES = $(S_PIECES:%=%.S) -S_O_FILES = $(S_FILES:%.S=${ARCH}/%.o) - -SRCS = $(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) -OBJS = $(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) - -include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg -include $(RTEMS_ROOT)/make/leaf.cfg - -INSTALL_CHANGE = @INSTALL_CHANGE@ - -PGM = ${ARCH}/crt0.o ${ARCH}/register.o - -# -# (OPTIONAL) Add local stuff here using += -# - -DEFINES += -CPPFLAGS += -CFLAGS += - -LD_PATHS += -LD_LIBS += -LDFLAGS += - -# -# Add your list of files to delete here. The config files -# already know how to delete some stuff, so you may want -# to just run 'make clean' first to see what gets missed. -# 'make clobber' already includes 'make clean' -# - -CLEAN_ADDITIONS += -CLOBBER_ADDITIONS += - -all: ${ARCH} $(SRCS) $(OBJS) $(PGM) - $(INSTALL_VARIANT) -m 755 ${PGM} $(PROJECT_RELEASE)/lib - -Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status - cd $(top_builddir) \ - && CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/lib/start/a29k/amd.ah b/c/src/lib/start/a29k/amd.ah deleted file mode 100644 index 69f34f173e..0000000000 --- a/c/src/lib/start/a29k/amd.ah +++ /dev/null @@ -1,517 +0,0 @@ -; /* @(#)amd.ah 1.1 96/05/23 08:56:58, TEI */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Initialization values for registers after RESET -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; /* $Id$ */ -; -;* File information and includes. - - .file "amd.ah" - .ident "@(#)amd.ah 1.1 96/05/23 08:56:58, TEI" - - - -; -;* AMD PROCESSOR SPECIFIC VALUES... -; - -; -;* Processor revision levels... -; - -; PRL values: 31-28 27-24 -; Am29000 0 x -; Am29005 1 x -; Am29050 2 x -; Am29035 3 x -; Am29030 4 x -; Am29200 5 x -; Am29205 5 1x -; Am29240 6 0 -; Manx 7 0 -; Cougar 8 0 - - - .equ AM29000_PRL, 0x00 - - .equ AM29005_PRL, 0x10 - - .equ AM29050_PRL, 0x20 - - .equ AM29035_PRL, 0x30 - - .equ AM29030_PRL, 0x40 - - .equ AM29200_PRL, 0x50 - - .equ AM29205_PRL, 0x58 - - .equ AM29240_PRL, 0x60 - - .equ AM29040_PRL, 0x70 - - .equ MANX_PRL, 0x70 - - .equ COUGAR_PRL, 0x80 - -; -;* data structures sizes. -; - .equ CFGINFO_SIZE, 16*4 - - .equ PGMINFO_SIZE, 16*4 - - .equ VARARGS_SPACE, 16*4 - - .equ WINDOWSIZE, 0x80 -; -;* Am29027 Mode registers -; - - .equ Am29027Mode1, 0x0fc00820 - - .equ Am29027Mode2, 0x00001375 - - - -;* Processor Based Equates and Defines - - .equ SIG_SYNC, -1 - - .equ ENABLE, (SM) - - .equ DISABLE, (ENABLE | DI | DA) - - .equ DISABLE_FZ, (FZ | ENABLE | DI | DA) - - .equ CLR_TRAP, (FZ | DA) - - .equ InitOPS, (TD | SM | (3< windowsize, gr1 == rab -; On exit: rfb - rab = windowsize, gr1 == rab -; - .global spill -spill: - sub tav, rab, gr1 ; tav = number of bytes to spill - srl tav, tav, 2 ; change byte count to word count - sub tav, tav, 1 ; make count zero based - mtsr CR, tav ; set Count Remaining register - sub tav, rab, gr1 - sub tav, rfb, tav ; pull down free bound and save it in rab - add rab, gr1, 0 ; first pull down allocate bound - storem 0, 0, lr0, tav ; store lr0..lr(tav) into rfb - jmpi tpc ; return... - add rfb, tav, 0 -; -; Here is the fill handler -; -; fill registers from [*rfb..*lr1) -; and move rfb upto where lr1 points. -; -; rab must change before rfb for signals to work -; -; On entry: rfb - rab = windowsize, lr1 > rfb -; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize -; On exit: rfb - rab = windowsize, lr1 == rfb -; - .global fill -fill: - const tav, 0x80 << 2 - or tav, tav, rfb ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2 - mtsr IPA, tav ; ipa = [rfb]<<2 == 1st reg to fill - ; gr0 is now the first reg to fill - sub tav, lr1, rfb ; tav = number of bytes to fill - add rab, rab, tav ; push up allocate bound - srl tav, tav, 2 ; change byte count to word count - sub tav, tav, 1 ; make count zero based - mtsr CR, tav ; set Count Remaining register - loadm 0, 0, gr0, rfb ; load registers - jmpi tpc ; return... - add rfb, lr1, 0 ; ... first pushing up free bound - -; -; The __init function -; -; .sect .init,text -; .use .init -; .global __init -;__init: -; sub gr1,gr1,16 -; asgeu V_SPILL,gr1,gr126 -; add lr1,gr1,24 -; -; -; The __fini function -; -; .sect .fini,text -; .use .fini -; .global __fini -;__fini: -; sub gr1,gr1,16 -; asgeu V_SPILL,gr1,gr126 -; add lr1,gr1,24 -; - .end diff --git a/c/src/lib/start/a29k/pswmacro.ah b/c/src/lib/start/a29k/pswmacro.ah deleted file mode 100644 index a994719c58..0000000000 --- a/c/src/lib/start/a29k/pswmacro.ah +++ /dev/null @@ -1,442 +0,0 @@ -; /* @(#)pswmacro.ah 1.1 96/05/23 08:56:58, TEI */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; macros: Do_install and init_TLB -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; /* $Id$ */ - -;* File information and includes. - - .file "macro.ah" - .ident "@(#)pswmacro.ah 1.1 96/05/23 08:56:58, TEI" - - - .macro CONST32, RegName, RegValue - const RegName, RegValue - consth RegName, RegValue - .endm - - .macro CONSTX, RegName, RegValue - .if (RegValue) <= 0x0000ffff - const RegName, RegValue - .else - const RegName, RegValue - consth RegName, RegValue - .endif - .endm - - .macro PRODEV, RegName - srl RegName, RegName, 24 - .endm - -; -;* MACRO TO INSTALL VECTOR TABLE ENTRIES -; - -;* Assumes vector table address in v0 - - .macro _setvec, trapnum, trapaddr - mfsr v0, vab ; - const v2, trapnum ; - sll v1, v2, 2 ; - add v1, v1, v0 ; v0 has location of vector tab - - const v2, trapaddr ; - consth v2, trapaddr ; - store 0, 0, v2, v1 ; - nop ; - .endm - - .macro syscall, name - const tav, HIF_@name ; - asneq V_SYSCALL, gr1, gr1 ; - nop ; - nop ; - .endm - - - -;* MACRO TO INSTALL VECTOR TABLE ENTRIES - - .macro Do_Install, V_Number, V_Address - const lr4, V_Address - consth lr4, V_Address - const lr3, V_Number * 4 - consth lr3, V_Number * 4 - call lr0, V_Install - nop - .endm - - .macro Do_InstallX, V_Number, V_Address - const lr4, V_Address - consth lr4, V_Address - const lr3, V_Number * 4 - consth lr3, V_Number * 4 - call lr0, V_InstallX - nop - .endm - - - -; push a register onto the stack - .macro pushreg, reg, sp - sub sp, sp, 4 ; adjust stack pointer - store 0, 0, reg, sp ; push register - .endm - - .macro push, sp, reg - sub sp, sp, 4 - store 0, 0, reg, sp - .endm - -; pop the register from stack - .macro popreg, reg, sp - load 0, 0, reg, sp ; pop register - add sp, sp, 4 ; adjust stack pointer - .endm - .macro pop, reg, sp - load 0, 0, reg, sp - add sp, sp, 4 - .endm - -; push a special register onto stack - .macro pushspcl, spcl, tmpreg, sp - sub sp, sp, 4 ; adjust stack pointer - mfsr tmpreg, spcl ; get spcl reg - store 0, 0, tmpreg, sp ; push onto stack - .endm - - .macro pushsr, sp, reg, sreg - mfsr reg, sreg - sub sp, sp, 4 - store 0, 0, reg, sp - .endm - -; pop a special register from stack - .macro popspcl, spcl, tmpreg, sp - load 0, 0, tmpreg, sp ; pop from stack - add sp, sp, 4 ; adjust stack pointer - mtsr spcl, tmpreg ; set spcl reg - .endm - - .macro popsr, sreg, reg, sp - load 0, 0, reg, sp - add sp, sp, 4 - mtsr sreg, reg - .endm - -; -; save freeze mode registers on memory stack. -; - - .macro SaveFZState, tmp1, tmp2 - - ; save freeze mode registers. - - pushspcl pc0, tmp1, msp - pushspcl pc1, tmp1, msp - pushspcl alu, tmp1, msp - - pushspcl cha, tmp1, msp - pushspcl chd, tmp1, msp - pushspcl chc, tmp1, msp - - pushspcl ops, tmp1, msp - - ; turn freeze off - - const tmp2, FZ - mfsr tmp1, cps - andn tmp1, tmp1, tmp2 - mtsr cps, tmp1 - .endm - -; restore freeze mode registers from memory stack. - - .macro RestoreFZState, tmp1, tmp2 - - ; turn freeze on - - const tmp2, (FZ|DI|DA) - mfsr tmp1, cps - or tmp1, tmp1, tmp2 - mtsr cps, tmp1 - - ; restore freeze mode registers. - - popspcl ops, tmp1, msp - popspcl chc, tmp1, msp - popspcl chd, tmp1, msp - popspcl cha, tmp1, msp - popspcl alu, tmp1, msp - popspcl pc1, tmp1, msp - popspcl pc0, tmp1, msp - .endm - -; -;* -; - .equ WS, 512 ; window size - .equ RALLOC, 4 * 4 ; stack alloc for C - .equ SIGCTX_UM_SIZE, 40 * 4 ; - .equ SIGCTX_RFB, (38) * 4 ; user mode saved - .equ SIGCTX_SM_SIZE, 12 * 4 ; - .equ SIGCTX_SIG, (11)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_GR1, (10)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_RAB, (9)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_PC0, (8)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_PC1, (7)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_PC2, (6)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_CHC, (3)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_OPS, (1)*4 + SIGCTX_UM_SIZE ; - .equ SIGCTX_TAV, (0)*4 + SIGCTX_UM_SIZE ; - - .macro sup_sv - add it2, trapreg, 0 ; transfer signal # - sub msp, msp, 4 ; - store 0, 0, it2, msp ; save signal number - sub msp, msp, 4 ; push gr1 - - store 0, 0, gr1, msp ; - sub msp, msp, 4 ; push rab - store 0, 0, rab, msp ; - const it0, WS ; Window size - - sub rab, rfb, it0 ; set rab = rfb-512 - pushsr msp, it0, PC0 ; save program counter0 - pushsr msp, it0, PC1 ; save program counter1 - pushsr msp, it0, PC2 ; save program counter2 - - pushsr msp, it0, CHA ; save channel address - pushsr msp, it0, CHD ; save channel data - pushsr msp, it0, CHC ; save channel control - pushsr msp, it0, ALU ; save alu - - pushsr msp, it0, OPS ; save ops - sub msp, msp, 4 ; - store 0, 0, tav, msp ; push tav - mtsrim chc, 0 ; no loadm/storem - - mfsr it0, ops ; get ops value - const it1, (TD | DI) ; disable interrupts - consth it1, (TD | DI) ; disable interrupts - or it0, it0, it1 ; set bits - - mtsr ops, it0 ; set new ops - const it0, sigcode ; signal handler - consth it0, sigcode ; signal handler - mtsr pc1, it0 ; store pc1 - - add it1, it0, 4 ; next addr - mtsr pc0, it1 ; store pc1 location - iret ; return - nop ; ALIGN - .endm - - .macro sig_return - mfsr it0, cps ; get processor status - const it1, FZ|DA ; Freeze + traps disable - or it0, it0, it1 ; to set FZ+DA - mtsr cps, it0 ; in freeze mode - - load 0, 0, tav, msp ; restore tav - add msp, msp, 4 ; - - popsr OPS,it0, msp ; - popsr ALU,it0, msp ; - popsr CHC,it0, msp ; - popsr CHD,it0, msp ; - - popsr CHA,it0, msp ; - popsr PC2,it0, msp ; - popsr PC1,it0, msp ; - popsr PC0,it0, msp ; - - load 0, 0, rab, msp ; - add msp, msp, 4 ; - load 0, 0, it0, msp ; - add gr1, it0, 0 ; pop rsp - - add msp, msp, 8 ; discount signal # - iret - .endm - - .macro repair_R_stack - add v0, msp, SIGCTX_GR1 ; interrupted gr1 - load 0, 0, v2, v0 ; - add v0, msp, SIGCTX_RFB ; - load 0, 0, v3, v0 ; interupted rfb - - const v1, WS ; - sub v1, v3, v1 ; rfb-512 - cpltu v0, v2, v1 ; test gr1 < rfb-512 - jmpf v0, $1 ; - - add gr1, rab, 0 ; - add v2, v1, 0 ; set LB = rfb-512 -$1: -;* if gr1 < rfb-512 yes LB = rfb-512 signalled during spill -;* if no, LB=gr1 interrupted cache < 126 registers - cpleu v0, v2, rfb ; test LB<=rfb - jmpf v0, $2 ; - nop ; - add v2, rfb, 0 ; -$2: - cpeq v0, v3, rfb ; fill rfb->'rfb - jmpt v0, $3 ; if rfb==rfb' - const tav, (0x80<<2) ; prepare for fill - or tav, tav, v2 ; - - mtsr IPA, tav ; IPA=LA<<2 - sub tav, v3, gr98 ; cache fill LA->rfb - srl tav, tav, 2 ; convert to words - sub tav, tav, 1 ; - - mtsr cr, tav ; - loadm 0, 0, gr0, v2 ; fill from LA->rfb -$3: - add rfb, v3, 0 ; move rfb upto 'rfb - sub rab, v1, 0 ; assign rab to rfb-512 - - add v0, msp, SIGCTX_GR1 ; - load 0, 0, v2, v0 ; v0 = interrupted gr1 - add gr1, v2, 0 ; move gr1 upto 'gr1 - nop ; - .endm - - .macro repair_regs - mtsrim cr, 29 - 1 ; to restore locals - loadm 0, 0, v0, msp ; - add msp, msp, 29*4 ; - popsr Q, tav, msp ; - - popsr IPC, tav, msp ; - popsr IPB, tav, msp ; - popsr IPA, tav, msp ; - pop FPStat3, msp ; floating point regs - - pop FPStat2, msp ; floating point regs - pop FPStat1, msp ; floating point regs - pop FPStat0, msp ; floating point regs - - add msp, msp, 3*4 ; R-stack repaired - .endm - -; -;*HIF related... -; - - - - -; send the message in bufaddr to Montip. - .macro SendMessageToMontip, bufaddr - const lr2, bufaddr -$1: - call lr0, _msg_send - consth lr2, bufaddr - cpeq gr96, gr96, 0 - jmpf gr96, $1 - const lr2, bufaddr - .endm - -; build a HIF_CALL message in bufaddr to send to montip. - .macro BuildHIFCALLMsg, bufaddr, tmp1, tmp2 - const tmp1, bufaddr - consth tmp1, bufaddr - const tmp2, HIF_CALL_MSGCODE - store 0, 0, tmp2, tmp1 ; msg code - add tmp1, tmp1, 4 - const tmp2, HIF_CALL_MSGLEN - store 0, 0, tmp2, tmp1 ; msg len - add tmp1, tmp1, 4 - store 0, 0, gr121, tmp1 ; service number - add tmp1, tmp1, 4 - store 0, 0, lr2, tmp1 ; lr2 - add tmp1, tmp1, 4 - store 0, 0, lr3, tmp1 ; lr3 - add tmp1, tmp1, 4 - store 0, 0, lr4, tmp1 ; lr4 - .endm - -; -;* -;* All the funky AMD style macros go in here...simply for -;* compatility -; -; - .macro IMPORT, symbol - .extern symbol - .endm - - .macro GLOBAL, symbol - .global symbol - .endm - - .macro USESECT, name, type - .sect name, type - .use name - .endm - - .macro SECTION, name, type - .sect name, type - .endm - - .macro FUNC, fname, lineno - .global fname -fname: - .endm - - .macro ENDFUNC, fname, lineno - .endm - -;*************************************LONG - .macro LONG, varname -varname: - .block 4 - .endm - -;*************************************UNSIGNED LONG - .macro ULONG, varname -varname: - .block 4 - .endm - -;*************************************SHORT - .macro SHORT, varname -varname: - .block 2 - .endm - -;*************************************CHAR - .macro CHAR, varname -varname: - .block 1 - .endm - -;*************************************LONGARRAY - .macro LONGARRAY, name, count -name: - .block count*4 - .endm - -;*************************************SHORTARRAY - - .macro SHORTARRAY, name, count -name: - .block count*2 - .endm - -;*************************************CHARARRAY - - .macro CHARARRAY, name, count -name: - .block count - .endm - - -;*************************************VOID_FPTR - - .macro VOID_FPTR, name -name: - .block 4 - .endm diff --git a/c/src/lib/start/a29k/register.S b/c/src/lib/start/a29k/register.S deleted file mode 100644 index 4d17071ed1..0000000000 --- a/c/src/lib/start/a29k/register.S +++ /dev/null @@ -1,393 +0,0 @@ -; /* @(#)register.s 1.1 96/05/23 08:57:34, TEI */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Register Definitions and Usage Conventions -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; /* $Id$ */ -; - -;* File information and includes. - - .file "c_register.s" - .ident "@(#)register.s 1.1 96/05/23 08:57:34, TEI\n" - -; Basic guidelines for register distribution and usage are derived from -; the AMD application notes. It would be best to stick with the conventions -; laid out by AMD. -; Application Note: Context Switching with 29000 Processor By Daniel Mann. - -; -;************************************************************************* -; - -; -; Rule 1: -; Gr1 is used as a pointer to the register stack -; Lr1 is used as frame pointer -; - - .reg regsp, gr1 ; Register Stack Pointer - .reg fp, lr1 ; frame pointer - - .equ Rrsp, ®sp - .equ Rfp, &fp - - .global Rrsp, Rfp - -; -;************************************************************************* -; - -; -; Gr2-Gr63 are not implemented in silicon -; - -; -;************************************************************************* -; - -; -; Rule 2: -; The registers GR64-GR95 are dedicated for operating system use. -; - -; The register range GR64-GR95 i.e 32 Registers is furthur sub-divided as -; follows... -; gr64-gr67 interrupt handlers. -; gr68-gr71 OS temporaries I -; gr72-gr79 OS temporaries II -; gr80-gr95 OS statics. Dedicated throughout the operation of a program. - - -; -; 32 Registers for Operating System Use. -; - -; -; Assigning Names to Interrupt Handlers Registers. -; - - .reg OSint0, gr64 - .reg OSint1, gr65 - .reg OSint2, gr66 - .reg OSint3, gr67 - - .equ ROSint0, &OSint0 - .equ ROSint1, &OSint1 - .equ ROSint2, &OSint2 - .equ ROSint3, &OSint3 - - .global ROSint0, ROSint1, ROSint2, ROSint3 - - .reg TrapReg, gr64 ; trap register - .reg trapreg, gr64 ; trapreg - - .equ RTrapReg, &TrapReg - .equ Rtrapreg, &trapreg - - .global RTrapReg, Rtrapreg - - -; -; Assigning Names to Scratch/Temporary Registers. -; - - .reg OStmp0, gr68 - .reg OStmp1, gr69 - .reg OStmp2, gr70 - .reg OStmp3, gr71 - - .reg OStmp4, gr72 - .reg OStmp5, gr73 - .reg OStmp6, gr74 - .reg OStmp7, gr75 - - .reg OStmp8, gr76 - .reg OStmp9, gr77 - .reg OStmp10, gr78 - .reg OStmp11, gr79 - - .equ ROStmp0, &OStmp0 - .equ ROStmp1, &OStmp1 - .equ ROStmp2, &OStmp2 - .equ ROStmp3, &OStmp3 - - .equ ROStmp4, &OStmp4 - .equ ROStmp5, &OStmp5 - .equ ROStmp6, &OStmp6 - .equ ROStmp7, &OStmp7 - - .equ ROStmp8, &OStmp8 - .equ ROStmp9, &OStmp9 - .equ ROStmp10, &OStmp10 - .equ ROStmp11, &OStmp11 - - .global ROStmp0, ROStmp1, ROStmp2, ROStmp3 - .global ROStmp4, ROStmp5, ROStmp6, ROStmp7 - .global ROStmp8, ROStmp9, ROStmp10, ROStmp11 - -; -; Assigning Names to Statics/Permanent Registers. -; - - .reg OSsta0, gr80 ; Spill Address Register - .reg OSsta1, gr81 ; Fill Address Register - .reg OSsta2, gr82 ; Signal Address Register - .reg OSsta3, gr83 ; pcb Register - - .reg OSsta4, gr84 ; - .reg OSsta5, gr85 ; - .reg OSsta6, gr86 ; - .reg OSsta7, gr87 ; - - .reg OSsta8, gr88 ; - .reg OSsta9, gr89 ; - .reg OSsta10, gr90 ; - .reg OSsta11, gr91 ; - - .reg OSsta12, gr92 ; - .reg OSsta13, gr93 ; - .reg OSsta14, gr94 ; - .reg OSsta15, gr95 ; - -; -; Round 2 of Name Assignments -; - -; -; Assignment of Specific Use oriented names to statics. -; - .reg SpillAddrReg, gr80 - .reg FillAddrReg, gr81 - .reg SignalAddrReg, gr82 - .reg pcb, gr83 - - .reg etx, gr80 - .reg ety, gr81 - .reg etz, gr82 - .reg etc, gr83 - -;* - - .reg TimerExt, gr84 - .reg TimerUtil, gr85 - -;* - - .reg LEDReg, gr86 - .reg ERRReg, gr87 - - .reg eta, gr86 - .reg etb, gr87 - -;* - - -;* The following registers are used by switching code - - .reg et0, gr88 - .reg et1, gr89 - .reg et2, gr90 - .reg et3, gr91 - - .reg et4, gr92 - .reg et5, gr93 - .reg et6, gr94 - .reg et7, gr95 - - -; The floating point trap handlers need a few static registers - - .reg FPStat0, gr88 - .reg FPStat1, gr89 - .reg FPStat2, gr90 - .reg FPStat3, gr91 - -; The following registers are used temporarily during diagnostics. - - .reg XLINXReg, gr92 - .reg VMBCReg, gr93 - .reg UARTReg, gr94 - .reg ETHERReg, gr95 - -;* - -;;* - .reg heapptr, gr90 - .reg ArgvPtr, gr91 -;;* - - - -; -;* Preparing to export Register Names for the Linkers benefit. -; - - .equ RSpillAddrReg, &SpillAddrReg - .equ RFillAddrReg, &FillAddrReg - .equ RSignalAddrReg, &SignalAddrReg - .equ Rpcb, &pcb - - .equ Retx, &etx - .equ Rety, &ety - .equ Retz, &etz - .equ Reta, &eta - - .equ Retb, &etb - .equ Retc, &etc - .equ RTimerExt, &TimerExt - .equ RTimerUtil, &TimerUtil - - .equ RLEDReg, &LEDReg - .equ RERRReg, &ERRReg - - .equ Ret0, &et0 - .equ Ret1, &et1 - .equ Ret2, &et2 - .equ Ret3, &et3 - - .equ RFPStat0, &FPStat0 - .equ RFPStat1, &FPStat1 - .equ RFPStat2, &FPStat2 - .equ RFPStat3, &FPStat3 - - .equ Rheapptr, &heapptr - .equ RHeapPtr, &heapptr - .equ RArgvPtr, &ArgvPtr - - .equ Ret4, &et4 - .equ Ret5, &et5 - .equ Ret6, &et6 - .equ Ret7, &et7 - - .equ RXLINXReg, &XLINXReg - .equ RVMBCReg, &VMBCReg - .equ RUARTReg, &UARTReg - .equ RETHERReg, ÐERReg - - .global RSpillAddrReg, RFillAddrReg, RSignalAddrReg - .global Rpcb, Retc - .global RTimerExt, RTimerUtil, RLEDReg, RERRReg - .global Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb - .global Retx, Rety, Retz - .global RFPStat0, RFPStat1, RFPStat2, RFPStat3 - .global Rheapptr, RHeapPtr, RArgvPtr - .global RXLINXReg, RVMBCReg, RUARTReg, RETHERReg - -; -;************************************************************************* -; - - -; -; Rule 3: -; Gr96-Gr127 Compiler & Programmer use registers. -; 32 Registers for Compiler & Programmer use - -; -; 16 Registers for Compiler Use. -; - -; -; Compiler Temporaries and Function Return Values -; - - .reg v0, gr96 ; First word of Return Value - .reg v1, gr97 - .reg v2, gr98 - .reg v3, gr99 - - .reg v4, gr100 - .reg v5, gr101 - .reg v6, gr102 - .reg v7, gr103 - - .reg v8, gr104 - .reg v9, gr105 - .reg v10, gr106 - .reg v11, gr107 - - .reg v12, gr108 - .reg v13, gr109 - .reg v14, gr110 - .reg v15, gr111 - - .equ Rv0, &v0 - .equ Rv1, &v1 - .equ Rv2, &v2 - .equ Rv3, &v3 - - .equ Rv4, &v4 - .equ Rv5, &v5 - .equ Rv6, &v6 - .equ Rv7, &v7 - - .equ Rv8, &v8 - .equ Rv9, &v9 - .equ Rv10, &v10 - .equ Rv11, &v11 - - .equ Rv12, &v12 - .equ Rv13, &v13 - .equ Rv14, &v14 - .equ Rv15, &v15 - - .global Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9 - .global Rv10, Rv11, Rv12, Rv13, Rv14, Rv15 - - -; -; User Process Statics Registers -; - - .reg rp0, gr112 ; Reserved for Programmer, #0 - .reg rp1, gr113 ; Reserved for Programmer, #1 - .reg rp2, gr114 ; Reserved for Programmer, #2 - .reg rp3, gr115 ; Reserved for Programmer, #3 - - .equ Rrp0, &rp0 - .equ Rrp1, &rp1 - .equ Rrp2, &rp2 - .equ Rrp3, &rp3 - - .global Rrp0, Rrp1, Rrp2, Rrp3 - -; -; Compiler Temporaries II -; - - .reg tv0, gr116 ; - .reg tv1, gr117 ; - .reg tv2, gr118 ; - .reg tv3, gr119 ; - .reg tv4, gr120 ; - - .equ Rtv0, &tv0 ; - .equ Rtv1, &tv1 ; - .equ Rtv2, &tv2 ; - .equ Rtv3, &tv3 ; - .equ Rtv4, &tv4 ; - - .global Rtv0, Rtv1, Rtv2, Rtv3, Rtv4 - -; -; Special pointers and registers for handlers and stack operations. -; - - .reg tav, gr121 ; Temp, Arg for Trap Handlers - .reg tpc, gr122 ; Temp, Ret PC for Trap Handlers - .reg lrp, gr123 ; Large Return Pointer - .reg slp, gr124 ; Static Link Pointer - - .reg msp, gr125 ; Memory Stack Pointer - .reg rab, gr126 ; Register Allocate Bound - .reg rfb, gr127 ; Register Free Bound - - .equ Rtav, &tav - .equ Rtpc, &tpc - .equ Rlrp, &lrp - .equ Rslp, &slp - .equ Rmsp, &msp - .equ Rrab, &rab - .equ Rrfb, &rfb - - .global Rtav, Rtpc, Rlrp, Rslp, Rmsp, Rrab, Rrfb diff --git a/c/src/lib/start/a29k/register.ah b/c/src/lib/start/a29k/register.ah deleted file mode 100644 index 1dced5b043..0000000000 --- a/c/src/lib/start/a29k/register.ah +++ /dev/null @@ -1,214 +0,0 @@ -; /* @(#)register.ah 1.1 96/05/23 08:56:57, TEI */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; naming of various registers -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; /* $Id$ */ - -;* File information and includes. - - .file "register.ah" - .ident "@(#)register.ah 1.1 96/05/23 08:56:57, TEI\n" - -;* Register Stack pointer and frame pointer registers. - - .extern Rrsp, Rfp - - .reg regsp, %%Rrsp - .reg fp, %%Rfp - - - .extern RTrapReg - .extern Rtrapreg - - .reg TrapReg, %%RTrapReg - .reg trapreg, %%Rtrapreg - - -;* Operating system Interrupt handler registers (gr64-gr67) - - .extern ROSint0, ROSint1, ROSint2, ROSint3 - - .reg OSint0, %%ROSint0 - .reg OSint1, %%ROSint1 - .reg OSint2, %%ROSint2 - .reg OSint3, %%ROSint3 - - .reg it0, %%ROSint0 - .reg it1, %%ROSint1 - .reg it2, %%ROSint2 - .reg it3, %%ROSint3 - - - -;* Operating system temporary (or scratch) registers (gr68-gr79) - - .extern ROStmp0, ROStmp1, ROStmp2, ROStmp3 - .extern ROStmp4, ROStmp5, ROStmp6, ROStmp7 - .extern ROStmp8, ROStmp9, ROStmp10, ROStmp11 - - .reg OStmp0, %%ROStmp0 - .reg OStmp1, %%ROStmp1 - .reg OStmp2, %%ROStmp2 - .reg OStmp3, %%ROStmp3 - - .reg OStmp4, %%ROStmp4 - .reg OStmp5, %%ROStmp5 - .reg OStmp6, %%ROStmp6 - .reg OStmp7, %%ROStmp7 - - .reg OStmp8, %%ROStmp8 - .reg OStmp9, %%ROStmp9 - .reg OStmp10, %%ROStmp10 - .reg OStmp11, %%ROStmp11 - - - .reg kt0, %%ROStmp0 - .reg kt1, %%ROStmp1 - .reg kt2, %%ROStmp2 - .reg kt3, %%ROStmp3 - - .reg kt4, %%ROStmp4 - .reg kt5, %%ROStmp5 - .reg kt6, %%ROStmp6 - .reg kt7, %%ROStmp7 - - .reg kt8, %%ROStmp8 - .reg kt9, %%ROStmp9 - .reg kt10, %%ROStmp10 - .reg kt11, %%ROStmp11 - - - .reg TempReg0, %%ROSint0 - .reg TempReg1, %%ROSint1 - .reg TempReg2, %%ROSint2 - .reg TempReg3, %%ROSint3 - - .reg TempReg4, %%ROStmp0 - .reg TempReg5, %%ROStmp1 - .reg TempReg6, %%ROStmp2 - .reg TempReg7, %%ROStmp3 - - .reg TempReg8, %%ROStmp4 - .reg TempReg9, %%ROStmp5 - .reg TempReg10, %%ROStmp6 - .reg TempReg11, %%ROStmp7 - - .reg TempReg12, %%ROStmp8 - .reg TempReg13, %%ROStmp9 - .reg TempReg14, %%ROStmp10 - .reg TempReg15, %%ROStmp11 - - -;* Assigned static registers - - .extern RSpillAddrReg, RFillAddrReg, RSignalAddrReg - .extern Rpcb, Retc - .extern RTimerExt, RTimerUtil, RLEDReg, RERRReg - .extern Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb - .extern Retx, Rety, Retz - - - .reg SpillAddrReg, %%RSpillAddrReg - .reg FillAddrReg, %%RFillAddrReg - .reg SignalAddrReg, %%RSignalAddrReg - .reg pcb, %%Rpcb - - .reg etx, %%Retx - .reg ety, %%Rety - .reg etz, %%Retz - .reg eta, %%Reta - - .reg etb, %%Retb - .reg etc, %%Retc - .reg TimerExt, %%RTimerExt - .reg TimerUtil, %%RTimerUtil - - .reg LEDReg, %%RLEDReg - .reg ERRReg, %%RERRReg - - - .reg et0, %%Ret0 - .reg et1, %%Ret1 - .reg et2, %%Ret2 - .reg et3, %%Ret3 - - .reg et4, %%Ret4 - .reg et5, %%Ret5 - .reg et6, %%Ret6 - .reg et7, %%Ret7 - -; - .equ SCB1REG_NUM, 88 - .reg SCB1REG_PTR, %%Ret0 - -; The floating point trap handlers need a few static registers - - .extern RFPStat0, RFPStat1, RFPStat2, RFPStat3 - .extern Rheapptr, RHeapPtr, RArgvPtr - - .reg FPStat0, %%RFPStat0 - .reg FPStat1, %%RFPStat1 - .reg FPStat2, %%RFPStat2 - .reg FPStat3, %%RFPStat3 - - .reg heapptr, %%Rheapptr - .reg HeapPtr, %%RHeapPtr - .reg ArgvPtr, %%RArgvPtr - - .extern RXLINXReg, RVMBCReg, RUARTReg, RETHERReg - - .reg XLINXReg, %%RXLINXReg - .reg VMBCReg, %%RVMBCReg - .reg UARTReg, %%RUARTReg - .reg ETHERReg, %%RXLINXReg - -;* Compiler and programmer registers. (gr96-gr127) - - .extern Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9 - .extern Rv10, Rv11, Rv12, Rv13, Rv14, Rv15 - - .reg v0, %%Rv0 - .reg v1, %%Rv1 - .reg v2, %%Rv2 - .reg v3, %%Rv3 - - .reg v4, %%Rv4 - .reg v5, %%Rv5 - .reg v6, %%Rv6 - .reg v7, %%Rv7 - - .reg v8, %%Rv8 - .reg v9, %%Rv9 - .reg v10, %%Rv10 - .reg v11, %%Rv11 - - .reg v12, %%Rv12 - .reg v13, %%Rv13 - .reg v14, %%Rv14 - .reg v15, %%Rv15 - - .extern Rtv0, Rtv1, Rtv2, Rtv3, Rtv4 - - .reg tv0, %%Rtv0 - .reg tv1, %%Rtv1 - .reg tv2, %%Rtv2 - .reg tv3, %%Rtv3 - .reg tv4, %%Rtv4 - -; **************************************************************************** -; For uatrap -; register definitions -- since this trap handler must allow for -; nested traps and interrupts such as TLB miss, protection violation, -; or Data Access Exception, and these trap handlers use the shared -; Temp registers, we must maintain our own that are safe over user- -; mode loads and stores. The following must be assigned global -; registers which are not used in INTR[0-3], TRAP[0-1], TLB miss, -; TLB protection violation, or data exception trap handlers. - -; .reg cha_cpy, OStmp4 ; copy of CHA -; .reg chd_cpy, OStmp5 ; copy of CHD -; .reg chc_cpy, OStmp6 ; copy of CHC -; .reg LTemp0, OStmp7 ; local temp 0 -; .reg LTemp1, OStmp8 ; local temp 1 - -; **************************************************************************** -- cgit v1.2.3