From 457b6ae167e56bc31946c1ed8fd483629239e0a8 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 6 Mar 1996 22:01:11 +0000 Subject: Generic 68360 BSP (gen360) submitted by: W. Eric Norum . Contact information: W. Eric Norum Saskatchewan Accelerator Laboratory 107 North Road University of Saskatchewan Saskatoon, Saskatchewan, CANADA S7N 5C6 --- c/src/lib/libbsp/m68k/gen68360/README | 283 +++++++++++++++ c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c | 149 ++++++++ c/src/lib/libbsp/m68k/gen68360/console/console.c | 311 ++++++++++++++++ c/src/lib/libbsp/m68k/gen68360/include/bsp.h | 132 +++++++ c/src/lib/libbsp/m68k/gen68360/include/coverhd.h | 76 ++++ c/src/lib/libbsp/m68k/gen68360/start/start360.s | 393 +++++++++++++++++++++ c/src/lib/libbsp/m68k/gen68360/start360/start360.s | 393 +++++++++++++++++++++ c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c | 27 ++ c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c | 247 +++++++++++++ c/src/lib/libbsp/m68k/gen68360/startup/init68360.c | 172 +++++++++ c/src/lib/libbsp/m68k/gen68360/startup/linkcmds | 77 ++++ c/src/lib/libbsp/m68k/gen68360/timer/timer.c | 95 +++++ 12 files changed, 2355 insertions(+) create mode 100644 c/src/lib/libbsp/m68k/gen68360/README create mode 100644 c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c create mode 100644 c/src/lib/libbsp/m68k/gen68360/console/console.c create mode 100644 c/src/lib/libbsp/m68k/gen68360/include/bsp.h create mode 100644 c/src/lib/libbsp/m68k/gen68360/include/coverhd.h create mode 100644 c/src/lib/libbsp/m68k/gen68360/start/start360.s create mode 100644 c/src/lib/libbsp/m68k/gen68360/start360/start360.s create mode 100644 c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c create mode 100644 c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c create mode 100644 c/src/lib/libbsp/m68k/gen68360/startup/init68360.c create mode 100644 c/src/lib/libbsp/m68k/gen68360/startup/linkcmds create mode 100644 c/src/lib/libbsp/m68k/gen68360/timer/timer.c (limited to 'c') diff --git a/c/src/lib/libbsp/m68k/gen68360/README b/c/src/lib/libbsp/m68k/gen68360/README new file mode 100644 index 0000000000..b38a6f84b0 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/README @@ -0,0 +1,283 @@ +# +# $Id$ +# + +# +# This package requires a version of GCC that has been modified +# to support the `-m68360' argument. I have submitted the required changes +# to the GCC maintainers. Should they choose to use a different argument +# (-mcpu32 perhaps) this board support package will have to be changed. +# + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +# +# Please send any comments, improvements, or bug reports to: +# W. Eric Norum +# Saskatchewan Accelerator Laboratory +# 107 North Road +# University of Saskatchewan +# Saskatoon, Saskatchewan, CANADA +# S7N 5C6 +# eric@skatter.usask.ca +# + +BSP NAME: gen68360 +BOARD: home-built +BUS: none +CPU FAMILY: Motorola CPU32+ +COPROCESSORS: none +MODE: not applicable + +DEBUG MONITOR: none (Hardware provides BDM) + +PERIPHERALS +=========== +TIMERS: PIT, Watchdog, 4 general purpose, 16 RISC + RESOLUTION: one microsecond +SERIAL PORTS: 4 SCC, 2 SMC, 1 SPI +REAL-TIME CLOCK: +DMA: Each serial port, 2 general purpose +VIDEO: none +SCSI: none +NETWORKING: Ethernet on SCC1. + +DRIVER INFORMATION +================== +CLOCK DRIVER: Programmable Interval Timer +IOSUPP DRIVER: Serial Management Controller 1 +SHMSUPP: none +TIMER DRIVER: Timer 1 + +STDIO +===== +PORT: SMC1 +ELECTRICAL: EIA-232 (if board supplies level shifter) +BAUD: 9600 +BITS PER CHARACTER: 8 +PARITY: None +STOP BITS: 1 + +NOTES +===== + +Board description +----------------- +clock rate: 25 MHz +bus width: 8-bit PROM, 32-bit DRAM +ROM: To 1 MByte, 180 nsec (3 wait states), chip select 0 +RAM: 4 MByte DRAM SIMM, 60 nsec (0 wait states), parity + +Host System +----------- +NEXTSTEP 3.3 (Intel and Motorola), Solaris 2.5 +gcc-2.7.2 +binutils-2.6 + +Verification +------------ +Single processor tests: Passed +Multi-processort tests: not applicable +Timing tests: + Context Switch + + context switch: self 10 + context switch: to another task 11 + context switch: no floating point contexts 40 + fp context switch: restore 1st FP task 41 + fp context switch: save initialized, restore initialized 14 + fp context switch: save idle, restore initialized 14 + fp context switch: save idle, restore idle 43 + + Task Manager + + rtems_task_create 133 + rtems_task_ident 351 + rtems_task_start 77 + rtems_task_restart: calling task 93 + rtems_task_restart: suspended task -- returns to caller 90 + rtems_task_restart: blocked task -- returns to caller 120 + rtems_task_restart: ready task -- returns to caller 92 + rtems_task_restart: suspended task -- preempts caller 121 + rtems_task_restart: blocked task -- preempts caller 143 + rtems_task_restart: ready task -- preempts caller 138 + rtems_task_delete: calling task 158 + rtems_task_delete: suspended task 129 + rtems_task_delete: blocked task 134 + rtems_task_delete: ready task 136 + rtems_task_suspend: calling task 71 + rtems_task_suspend: returns to caller 47 + rtems_task_resume: task readied -- returns to caller 48 + rtems_task_resume: task readied -- preempts caller 67 + rtems_task_set_priority: obtain current priority 36 + rtems_task_set_priority: returns to caller 65 + rtems_task_set_priority: preempts caller 102 + rtems_task_mode: obtain current mode 13 + rtems_task_mode: no reschedule 15 + rtems_task_mode: reschedule -- returns to caller 22 + rtems_task_mode: reschedule -- preempts caller 61 + rtems_task_get_note 38 + rtems_task_set_note 37 + rtems_task_wake_after: yield -- returns to caller 22 + rtems_task_wake_after: yields -- preempts caller 56 + rtems_task_wake_when 110 + + Interrupt Manager + + interrupt entry overhead: returns to nested interrupt 8 + interrupt entry overhead: returns to interrupted task 8 + interrupt entry overhead: returns to preempting task 8 + interrupt exit overhead: returns to nested interrupt 7 + interrupt exit overhead: returns to interrupted task 8 + interrupt exit overhead: returns to preempting task 52 + + Clock Manager + + rtems_clock_set 82 + rtems_clock_get 2 + rtems_clock_tick 15 + + Timer Manager + + rtems_timer_create 33 + rtems_timer_ident 343 + rtems_timer_delete: inactive 47 + rtems_timer_delete: active 50 + rtems_timer_fire_after: inactive 59 + rtems_timer_fire_after: active 63 + rtems_timer_fire_when: inactive 83 + rtems_timer_fire_when: active 83 + rtems_timer_reset: inactive 55 + rtems_timer_reset: active 58 + rtems_timer_cancel: inactive 35 + rtems_timer_cancel: active 38 + + Semaphore Manager + + rtems_semaphore_create 62 + rtems_semaphore_ident 368 + rtems_semaphore_delete 61 + rtems_semaphore_obtain: available 42 + rtems_semaphore_obtain: not available -- NO_WAIT 42 + rtems_semaphore_obtain: not available -- caller blocks 105 + rtems_semaphore_release: no waiting tasks 46 + rtems_semaphore_release: task readied -- returns to caller 64 + rtems_semaphore_release: task readied -- preempts caller 84 + + Message Queue Manager + + rtems_message_queue_create 240 + rtems_message_queue_ident 342 + rtems_message_queue_delete 79 + rtems_message_queue_send: no waiting tasks 93 + rtems_message_queue_send: task readied -- returns to caller 96 + rtems_message_queue_send: task readied -- preempts caller 116 + rtems_message_queue_urgent: no waiting tasks 93 + rtems_message_queue_urgent: task readied -- returns to caller 97 + rtems_message_queue_urgent: task readied -- preempts caller 117 + rtems_message_queue_broadcast: no waiting tasks 54 + rtems_message_queue_broadcast: task readied -- returns to caller 106 + rtems_message_queue_broadcast: task readied -- preempts caller 126 + rtems_message_queue_receive: available 79 + rtems_message_queue_receive: not available -- NO_WAIT 48 + rtems_message_queue_receive: not available -- caller blocks 111 + rtems_message_queue_flush: no messages flushed 35 + rtems_message_queue_flush: messages flushed 44 + + Event Manager + + rtems_event_send: no task readied 30 + rtems_event_send: task readied -- returns to caller 59 + rtems_event_send: task readied -- preempts caller 81 + rtems_event_receive: obtain current events 1 + rtems_event_receive: available 34 + rtems_event_receive: not available -- NO_WAIT 31 + rtems_event_receive: not available -- caller blocks 84 + + Signal Manager + + rtems_signal_catch 24 + rtems_signal_send: returns to caller 42 + rtems_signal_send: signal to self 47 + exit ASR overhead: returns to calling task 33 + exit ASR overhead: returns to preempting task 58 + + Partition Manager + + rtems_partition_create 78 + rtems_partition_ident 342 + rtems_partition_delete 46 + rtems_partition_get_buffer: available 40 + rtems_partition_get_buffer: not available 39 + rtems_partition_return_buffer 47 + + Region Manager + + rtems_region_create 65 + rtems_region_ident 349 + rtems_region_delete 45 + rtems_region_get_segment: available 55 + rtems_region_get_segment: not available -- NO_WAIT 52 + rtems_region_get_segment: not available -- caller blocks 119 + rtems_region_return_segment: no waiting tasks 57 + rtems_region_return_segment: task readied -- returns to caller 106 + rtems_region_return_segment: task readied -- preempts caller 127 + + Dual-Ported Memory Manager + + rtems_port_create 40 + rtems_port_ident 342 + rtems_port_delete 44 + rtems_port_internal_to_external 32 + rtems_port_external_to_internal 32 + + IO Manager + + rtems_io_initialize 4 + rtems_io_open 1 + rtems_io_close 1 + rtems_io_read 1 + rtems_io_write 1 + rtems_io_control 1 + + Rate Monotonic Manager + + rtems_rate_monotonic_create 39 + rtems_rate_monotonic_ident 343 + rtems_rate_monotonic_cancel 43 + rtems_rate_monotonic_delete: active 54 + rtems_rate_monotonic_delete: inactive 52 + rtems_rate_monotonic_period: obtain status 37 + rtems_rate_monotonic_period: initiate period -- returns to caller 58 + rtems_rate_monotonic_period: conclude periods -- caller blocks 75 + +Porting +------- +This board support package is written for a 68360 system similar to that +described in chapter 9 of the Motorola MC68360 Quad Integrated Communication +Processor Users' Manual. The salient details of this hardware are: + + 25 MHz external clock + DRAM address multiplexing provided by 68360 + 8-bit 180nsec PROM to CS0* + 4 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1* + Console serial port on SMC1 + +The board support package has been tested with a home-built board and with an +ACE360A board produced by: + Atlas Computer Equipment + 703 Colina Lane + Santa Barbara, CA 93103 diff --git a/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c new file mode 100644 index 0000000000..dbcf7c2396 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c @@ -0,0 +1,149 @@ +/* + * This routine initializes the MC68360 Periodic Interval Timer + * + * The PIT has rather poor resolution, but it is easy to set up + * and requires no housekeeping once it is going. + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +/* + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + */ + +#include /* for atexit() */ +#include +#include +#include "mc68360.h" + +#define CLOCK_VECTOR 120 +#define CLOCK_IRQ_LEVEL 6 + +/* + * Clock_driver_ticks is a monotonically increasing counter of the + * number of clock ticks since the driver was initialized. + */ +volatile rtems_unsigned32 Clock_driver_ticks; + +/* + * These are set by clock driver during its init + */ + +rtems_device_major_number rtems_clock_major = ~0; +rtems_device_minor_number rtems_clock_minor; + +/* + * Periodic interval timer interrupt handler + */ +rtems_isr +Clock_isr (rtems_vector_number vector) +{ + Clock_driver_ticks++; + rtems_clock_tick(); +} + +void +Clock_exit (void) +{ + if (BSP_Configuration.ticks_per_timeslice ) { + /* + * Turn off periodic interval timer + */ + m360.pitr &= ~0xFF; + } +} + +static void +Install_clock (rtems_isr_entry clock_isr) +{ + Clock_driver_ticks = 0; + if ( BSP_Configuration.ticks_per_timeslice ) { + int pitr; + + /* + * Choose periodic interval timer register value + * For a 25 MHz external clock the basic clock rate is + * 40 nsec * 128 * 4 = 20.48 usec/tick + */ + pitr = ((BSP_Configuration.microseconds_per_tick * 100) + 1023) / 2048; + if (pitr >= 256) { + pitr = (pitr + 255) / 512; + if (pitr >= 256) + pitr = 255; + else if (pitr == 0) + pitr = 1; + pitr |= 0x100; + } + else if (pitr == 0) { + pitr = 1; + } + m360.pitr &= ~0x1FF; + m360.picr = (CLOCK_IRQ_LEVEL << 8) | CLOCK_VECTOR; + set_vector (clock_isr, CLOCK_VECTOR, 1); + m360.pitr |= pitr; + atexit (Clock_exit); + } +} + +rtems_device_driver +Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + Install_clock (Clock_isr); + + /* + * make major/minor avail to others such as shared memory driver + */ + rtems_clock_major = major; + rtems_clock_minor = minor; + + return RTEMS_SUCCESSFUL; +} + +rtems_device_driver Clock_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + rtems_unsigned32 isrlevel; + rtems_libio_ioctl_args_t *args = pargp; + + if (args) { + /* + * This is hokey, but until we get a defined interface + * to do this, it will just be this simple... + */ + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { + Clock_isr( CLOCK_VECTOR); + } + else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) { + rtems_interrupt_disable( isrlevel ); + (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); + rtems_interrupt_enable( isrlevel ); + } + } + return RTEMS_SUCCESSFUL; +} diff --git a/c/src/lib/libbsp/m68k/gen68360/console/console.c b/c/src/lib/libbsp/m68k/gen68360/console/console.c new file mode 100644 index 0000000000..e346b99088 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/console/console.c @@ -0,0 +1,311 @@ +/* + * Initialize SMC1 for console IO. + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +/* + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + */ + +#define GEN68360_INIT + +#include +#include +#include "mc68360.h" + +/* console_initialize + * + * This routine initializes the console IO driver. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +/* + * Place buffer descriptors at end of User Data/BD space in dual-port RAM + */ +#define consoleRxBd ((volatile m360BufferDescriptor_t *)((char *)m360.dpram1 + \ + (sizeof(m360.dpram2) - 2*sizeof(m360BufferDescriptor_t)))) +#define consoleTxBd ((volatile m360BufferDescriptor_t *)((char *)m360.dpram1 + \ + (sizeof(m360.dpram2) - sizeof(m360BufferDescriptor_t)))) + +/* + * I/O buffers can be in ordindary RAM + */ +static volatile char rxBuf, txBuf; + +rtems_device_driver console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +) +{ + rtems_status_code status; + + /* + * Configure port B pins to enable SMTXD1 and SMRXD1 pins + */ + m360.pbpar |= 0xC0; + m360.pbdir &= ~0xC0; + m360.pbodr &= ~0xC0; + + /* + * Set up BRG1 (9,600 baud) + */ + m360.brgc1 = M360_BRG_RST; + m360.brgc1 = M360_BRG_EN | M360_BRG_EXTC_BRGCLK | M360_BRG_9600; + + /* + * Put SMC1 in NMSI mode, connect SMC1 to BRG1 + */ + m360.simode |= M360_SI_SMC1_BRG1; + + /* + * Set up SMC1 parameter RAM common to all protocols + */ + m360.smc1p.rbase = (char *)consoleRxBd - (char *)&m360; + m360.smc1p.tbase = (char *)consoleTxBd - (char *)&m360; + m360.smc1p.rfcr = M360_RFCR_MOT | M360_RFCR_DMA_SPACE; + m360.smc1p.tfcr = M360_TFCR_MOT | M360_TFCR_DMA_SPACE; + m360.smc1p.mrblr = 1; + + /* + * Set up SMC1 parameter RAM UART-specific parameters + */ + m360.smc1p.un.uart.max_idl = 0; + m360.smc1p.un.uart.brklen = 0; + m360.smc1p.un.uart.brkec = 0; + m360.smc1p.un.uart.brkcr = 0; + + /* + * Set up the Receive Buffer Descriptor + */ + consoleRxBd->status = M360_BD_EMPTY | M360_BD_WRAP; + consoleRxBd->length = 0; + consoleRxBd->buffer = &rxBuf; + + /* + * Setup the Transmit Buffer Descriptor + */ + consoleTxBd->length = 1; + consoleTxBd->status = M360_BD_WRAP; + consoleTxBd->buffer = &txBuf; + + /* + * Set up SMC1 general and protocol-specific mode registers + */ + m360.smc1.smce = ~0; /* Clear any pending events */ + m360.smc1.smcm = 0; /* Mask all interrupt/event sources */ + m360.smc1.smcmr = M360_SMCMR_CLEN(9) | M360_SMCMR_SM_UART; + + /* + * Send "Init parameters" command + */ + m360.cr = M360_CR_OP_INIT_RX_TX | M360_CR_CHAN_SMC1 | M360_CR_FLG; + while (m360.cr & M360_CR_FLG) + continue; + + /* + * Enable receiver and transmitter + */ + m360.smc1.smcmr |= M360_SMCMR_TEN | M360_SMCMR_REN; + + status = rtems_io_register_name( + "/dev/console", + major, + (rtems_device_minor_number)0); + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred(status); + return RTEMS_SUCCESSFUL; +} + +/* is_character_ready + * + * Check to see if a character is available on the console port. If so, + * then return a TRUE (along with the character). Otherwise return FALSE. + * + * Input parameters: pointer to location in which to return character + * + * Output parameters: character (if available) + * + * Return values: TRUE - character available + * FALSE - no character available + */ + +rtems_boolean is_character_ready( + char *ch /* -> character */ +) +{ + if (consoleRxBd->status & M360_BD_EMPTY) + return FALSE; + *ch = rxBuf; + consoleRxBd->status = M360_BD_EMPTY | M360_BD_WRAP; + return TRUE; +} + + +/* inbyte + * + * Receive a character from the console port + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: character read + */ + +char inbyte( void ) +{ + char ch; + + while (is_character_ready (&ch) == FALSE) + continue; + return ch; +} + + +/* outbyte + * + * Transmit a character to the console serial port + * + * Input parameters: + * ch - character to be transmitted + * + * Output parameters: NONE + */ + +void outbyte( + char ch +) +{ + if (ch == '\n') + outbyte('\r'); + while (consoleTxBd->status & M360_BD_READY) + continue; + txBuf = ch; + consoleTxBd->status = M360_BD_READY | M360_BD_WRAP; +} + +/* + * Open entry point + */ + +rtems_device_driver console_open( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} + +/* + * Close entry point + */ + +rtems_device_driver console_close( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} + +/* + * read bytes from the serial port. We only have stdin. + */ + +rtems_device_driver console_read( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + rtems_libio_rw_args_t *rw_args; + char *buffer; + int maximum; + int count = 0; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + buffer[ count ] = inbyte(); + if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { + buffer[ count++ ] = '\n'; + buffer[ count ] = 0; + break; + } + } + + rw_args->bytes_moved = count; + return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; +} + +/* + * write bytes to the serial port. Stdout and stderr are the same. + */ + +rtems_device_driver console_write( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + int count; + int maximum; + rtems_libio_rw_args_t *rw_args; + char *buffer; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + if ( buffer[ count ] == '\n') { + outbyte('\r'); + } + outbyte( buffer[ count ] ); + } + + rw_args->bytes_moved = maximum; + return 0; +} + +/* + * IO Control entry point + */ + +rtems_device_driver console_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} diff --git a/c/src/lib/libbsp/m68k/gen68360/include/bsp.h b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h new file mode 100644 index 0000000000..4525e78141 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/include/bsp.h @@ -0,0 +1,132 @@ +/* + * Board Support Package for `Generic' Motorola MC68360 + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +/* bsp.h + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + */ + +#ifndef __GEN68360_BSP_h +#define __GEN68360_BSP_h + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Stuff for Time Test 27 + * Don't bother with hardware -- just use a software-interrupt + */ + +#define MUST_WAIT_FOR_INTERRUPT 0 + +#define Install_tm27_vector( handler ) set_vector( (handler), 34, 1 ) + +#define Cause_tm27_intr() asm volatile ("trap #2"); + +#define Clear_tm27_intr() + +#define Lower_tm27_intr() + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) \ + { register rtems_unsigned32 _delay=(microseconds); \ + register rtems_unsigned32 _tmp=123; \ + asm volatile( "0: \ + nbcd %0 ; \ + nbcd %0 ; \ + dbf %1,0b" \ + : "=d" (_tmp), "=d" (_delay) \ + : "0" (_tmp), "1" (_delay) ); \ + } + +/* Constants */ + +/* Structures */ + +#ifdef GEN68360_INIT +#undef EXTERN +#define EXTERN +#else +#undef EXTERN +#define EXTERN extern +#endif + +/* + * Device Driver Table Entries + */ + +/* + * NOTE: Use the standard Console driver entry + */ + +/* + * NOTE: Use the standard Clock driver entry + */ + +/* + * How many libio files we want + */ + +#define BSP_LIBIO_MAX_FDS 20 + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +extern m68k_isr_entry M68Kvec[]; /* vector table address */ + +/* functions */ + +void bsp_cleanup( void ); + +m68k_isr_entry set_vector( + rtems_isr_entry handler, + rtems_vector_number vector, + int type +); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/gen68360/include/coverhd.h b/c/src/lib/libbsp/m68k/gen68360/include/coverhd.h new file mode 100644 index 0000000000..020543466f --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/include/coverhd.h @@ -0,0 +1,76 @@ +/* + * This file was machine-generated from the tmoverhd.exe output + * + * $Id$ + */ +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 2 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 2 +#define CALLING_OVERHEAD_TASK_CREATE 3 +#define CALLING_OVERHEAD_TASK_IDENT 3 +#define CALLING_OVERHEAD_TASK_START 3 +#define CALLING_OVERHEAD_TASK_RESTART 2 +#define CALLING_OVERHEAD_TASK_DELETE 2 +#define CALLING_OVERHEAD_TASK_SUSPEND 2 +#define CALLING_OVERHEAD_TASK_RESUME 2 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 3 +#define CALLING_OVERHEAD_TASK_MODE 3 +#define CALLING_OVERHEAD_TASK_GET_NOTE 3 +#define CALLING_OVERHEAD_TASK_SET_NOTE 3 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 5 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 2 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 3 +#define CALLING_OVERHEAD_CLOCK_GET 6 +#define CALLING_OVERHEAD_CLOCK_SET 5 +#define CALLING_OVERHEAD_CLOCK_TICK 1 +#define CALLING_OVERHEAD_TIMER_CREATE 2 +#define CALLING_OVERHEAD_TIMER_DELETE 2 +#define CALLING_OVERHEAD_TIMER_IDENT 2 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 3 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 7 +#define CALLING_OVERHEAD_TIMER_RESET 2 +#define CALLING_OVERHEAD_TIMER_CANCEL 2 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 3 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 2 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 3 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 3 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 2 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 3 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 3 +#define CALLING_OVERHEAD_EVENT_SEND 3 +#define CALLING_OVERHEAD_EVENT_RECEIVE 3 +#define CALLING_OVERHEAD_SIGNAL_CATCH 2 +#define CALLING_OVERHEAD_SIGNAL_SEND 3 +#define CALLING_OVERHEAD_PARTITION_CREATE 4 +#define CALLING_OVERHEAD_PARTITION_IDENT 3 +#define CALLING_OVERHEAD_PARTITION_DELETE 2 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 3 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 3 +#define CALLING_OVERHEAD_REGION_CREATE 4 +#define CALLING_OVERHEAD_REGION_IDENT 2 +#define CALLING_OVERHEAD_REGION_DELETE 2 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 3 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 3 +#define CALLING_OVERHEAD_PORT_CREATE 4 +#define CALLING_OVERHEAD_PORT_IDENT 2 +#define CALLING_OVERHEAD_PORT_DELETE 2 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 3 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 3 +#define CALLING_OVERHEAD_IO_INITIALIZE 3 +#define CALLING_OVERHEAD_IO_OPEN 3 +#define CALLING_OVERHEAD_IO_CLOSE 3 +#define CALLING_OVERHEAD_IO_READ 3 +#define CALLING_OVERHEAD_IO_WRITE 3 +#define CALLING_OVERHEAD_IO_CONTROL 3 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 2 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 2 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 1 diff --git a/c/src/lib/libbsp/m68k/gen68360/start/start360.s b/c/src/lib/libbsp/m68k/gen68360/start/start360.s new file mode 100644 index 0000000000..c446784d97 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/start/start360.s @@ -0,0 +1,393 @@ +/* entry.s + * + * This file contains the entry point for the application. + * The name of this entry point is compiler dependent. + * It jumps to the BSP which is responsible for performing + * all initialization. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + /* + * Step 1: Decide on Reset Stack Pointer and Initial Program Counter + */ +Entry: + .long SYM(m360)+1024 | 0: Initial SSP + .long start | 1: Initial PC + .long uhoh | 2: Bus error + .long uhoh | 3: Address error + .long uhoh | 4: Illegal instruction + .long uhoh | 5: Zero division + .long uhoh | 6: CHK, CHK2 instruction + .long uhoh | 7: TRAPcc, TRAPV instructions + .long uhoh | 8: Privilege violation + .long uhoh | 9: Trace + .long uhoh | 10: Line 1010 emulator + .long uhoh | 11: Line 1111 emulator + .long uhoh | 12: Hardware breakpoint + .long uhoh | 13: Reserved for coprocessor violation + .long uhoh | 14: Format error + .long uhoh | 15: Uninitialized interrupt + .long uhoh | 16: Unassigned, reserved + .long uhoh | 17: + .long uhoh | 18: + .long uhoh | 19: + .long uhoh | 20: + .long uhoh | 21: + .long uhoh | 22: + .long uhoh | 23: + .long uhoh | 24: Spurious interrupt + .long uhoh | 25: Level 1 interrupt autovector + .long uhoh | 26: Level 2 interrupt autovector + .long uhoh | 27: Level 3 interrupt autovector + .long uhoh | 28: Level 4 interrupt autovector + .long uhoh | 29: Level 5 interrupt autovector + .long uhoh | 30: Level 6 interrupt autovector + .long uhoh | 31: Level 7 interrupt autovector + .long uhoh | 32: Trap instruction (0-15) + .long uhoh | 33: + .long uhoh | 34: + .long uhoh | 35: + .long uhoh | 36: + .long uhoh | 37: + .long uhoh | 38: + .long uhoh | 39: + .long uhoh | 40: + .long uhoh | 41: + .long uhoh | 42: + .long uhoh | 43: + .long uhoh | 44: + .long uhoh | 45: + .long uhoh | 46: + .long uhoh | 47: + .long uhoh | 48: Reserved for coprocessor + .long uhoh | 49: + .long uhoh | 50: + .long uhoh | 51: + .long uhoh | 52: + .long uhoh | 53: + .long uhoh | 54: + .long uhoh | 55: + .long uhoh | 56: + .long uhoh | 57: + .long uhoh | 58: + .long uhoh | 59: Unassigned, reserved + .long uhoh | 60: + .long uhoh | 61: + .long uhoh | 62: + .long uhoh | 63: + .long uhoh | 64: User defined vectors (192) + .long uhoh | 65: + .long uhoh | 66: + .long uhoh | 67: + .long uhoh | 68: + .long uhoh | 69: + .long uhoh | 70: + .long uhoh | 71: + .long uhoh | 72: + .long uhoh | 73: + .long uhoh | 74: + .long uhoh | 75: + .long uhoh | 76: + .long uhoh | 77: + .long uhoh | 78: + .long uhoh | 79: + .long uhoh | 80: + .long uhoh | 81: + .long uhoh | 82: + .long uhoh | 83: + .long uhoh | 84: + .long uhoh | 85: + .long uhoh | 86: + .long uhoh | 87: + .long uhoh | 88: + .long uhoh | 89: + .long uhoh | 90: + .long uhoh | 91: + .long uhoh | 92: + .long uhoh | 93: + .long uhoh | 94: + .long uhoh | 95: + .long uhoh | 96: + .long uhoh | 97: + .long uhoh | 98: + .long uhoh | 99: + .long uhoh | 100: + .long uhoh | 101: + .long uhoh | 102: + .long uhoh | 103: + .long uhoh | 104: + .long uhoh | 105: + .long uhoh | 106: + .long uhoh | 107: + .long uhoh | 108: + .long uhoh | 109: + .long uhoh | 110: + .long uhoh | 111: + .long uhoh | 112: + .long uhoh | 113: + .long uhoh | 114: + .long uhoh | 115: + .long uhoh | 116: + .long uhoh | 117: + .long uhoh | 118: + .long uhoh | 119: + .long uhoh | 120: + .long uhoh | 121: + .long uhoh | 122: + .long uhoh | 123: + .long uhoh | 124: + .long uhoh | 125: + .long uhoh | 126: + .long uhoh | 127: + .long uhoh | 128: + .long uhoh | 129: + .long uhoh | 130: + .long uhoh | 131: + .long uhoh | 132: + .long uhoh | 133: + .long uhoh | 134: + .long uhoh | 135: + .long uhoh | 136: + .long uhoh | 137: + .long uhoh | 138: + .long uhoh | 139: + .long uhoh | 140: + .long uhoh | 141: + .long uhoh | 142: + .long uhoh | 143: + .long uhoh | 144: + .long uhoh | 145: + .long uhoh | 146: + .long uhoh | 147: + .long uhoh | 148: + .long uhoh | 149: + .long uhoh | 150: + .long uhoh | 151: + .long uhoh | 152: + .long uhoh | 153: + .long uhoh | 154: + .long uhoh | 155: + .long uhoh | 156: + .long uhoh | 157: + .long uhoh | 158: + .long uhoh | 159: + .long uhoh | 160: + .long uhoh | 161: + .long uhoh | 162: + .long uhoh | 163: + .long uhoh | 164: + .long uhoh | 165: + .long uhoh | 166: + .long uhoh | 167: + .long uhoh | 168: + .long uhoh | 169: + .long uhoh | 170: + .long uhoh | 171: + .long uhoh | 172: + .long uhoh | 173: + .long uhoh | 174: + .long uhoh | 175: + .long uhoh | 176: + .long uhoh | 177: + .long uhoh | 178: + .long uhoh | 179: + .long uhoh | 180: + .long uhoh | 181: + .long uhoh | 182: + .long uhoh | 183: + .long uhoh | 184: + .long uhoh | 185: + .long uhoh | 186: + .long uhoh | 187: + .long uhoh | 188: + .long uhoh | 189: + .long uhoh | 190: + .long uhoh | 191: + .long uhoh | 192: + .long uhoh | 193: + .long uhoh | 194: + .long uhoh | 195: + .long uhoh | 196: + .long uhoh | 197: + .long uhoh | 198: + .long uhoh | 199: + .long uhoh | 200: + .long uhoh | 201: + .long uhoh | 202: + .long uhoh | 203: + .long uhoh | 204: + .long uhoh | 205: + .long uhoh | 206: + .long uhoh | 207: + .long uhoh | 208: + .long uhoh | 209: + .long uhoh | 210: + .long uhoh | 211: + .long uhoh | 212: + .long uhoh | 213: + .long uhoh | 214: + .long uhoh | 215: + .long uhoh | 216: + .long uhoh | 217: + .long uhoh | 218: + .long uhoh | 219: + .long uhoh | 220: + .long uhoh | 221: + .long uhoh | 222: + .long uhoh | 223: + .long uhoh | 224: + .long uhoh | 225: + .long uhoh | 226: + .long uhoh | 227: + .long uhoh | 228: + .long uhoh | 229: + .long uhoh | 230: + .long uhoh | 231: + .long uhoh | 232: + .long uhoh | 233: + .long uhoh | 234: + .long uhoh | 235: + .long uhoh | 236: + .long uhoh | 237: + .long uhoh | 238: + .long uhoh | 239: + .long uhoh | 240: + .long uhoh | 241: + .long uhoh | 242: + .long uhoh | 243: + .long uhoh | 244: + .long uhoh | 245: + .long uhoh | 246: + .long uhoh | 247: + .long uhoh | 248: + .long uhoh | 249: + .long uhoh | 250: + .long uhoh | 251: + .long uhoh | 252: + .long uhoh | 253: + .long uhoh | 254: + .long uhoh | 255: + +/* + * Default trap handler + * With an oscilloscope you can see AS* stop + */ +uhoh: nop | Leave spot for breakpoint + stop #0x2700 | Stop with interrupts disabled + bra.b uhoh | Stuck forever + +/* + * Place the low-order 3 octets of the board's + * ethernet address at a `well-known' location. + */ + .align 2 +| .long ETHERNET_ADDRESS | 08: Low-order 3 octets + +/* + * Initial PC + */ +start: + /* + * Step 2: Stay in Supervisor Mode + * (i.e. just do nothing for this step) + */ + + /* + * Step 3: Write the VBR + */ + lea Entry,a0 | Get base of vector table + movec a0,VBR | Set up the VBR + + /* + * Step 4: Write the MBAR + */ + movec DFC,d1 | Save destination register + moveq #7,d0 | CPU-space funcction code + movec d0,DFC | Set destination function code register + movel #SYM(m360)+0x101,d0 | MBAR value (mask CPU space accesses) + movesl d0,0x3FF00 | Set MBAR + movec d1,DFC | Restore destination register + + /* + * Step 5: Verify a dual-port RAM location + */ + lea SYM(m360),a0 | Point a0 to first DPRAM location + moveb #0x33,d0 | Set the test value + moveb d0,a0@ | Set the memory location + cmpb a0@,d0 | Does it read back? + bne uhoh | If not, bad news! + notb d0 | Flip bits + moveb d0,a0@ | Set the memory location + cmpb a0@,d0 | Does it read back? + bne uhoh | If not, bad news! + + /* + * Remaining steps are handled by C code + */ + jmp SYM(_Init68360) | Start C code (which never returns) + + +/* + * Clear BSS, set up real stack, initialize heap, start C program + * Assume that BSS size is a multiple of 4. + * FIXME: The zero-loop should be changed to put the CPU into loop-mode. + * FIXME: PROM-based systems will have to copy data segment to RAM here + */ + PUBLIC (_ClearBSSAndStart) +SYM(_ClearBSSAndStart): + movel #clear_start,a0 + movel #clear_end,a1 + clrl d0 + brab ZEROLOOPTEST +ZEROLOOP: + movel d0,a0@+ +ZEROLOOPTEST: + cmpl a1,a0 + bcsb ZEROLOOP + movel #stack_init,a7 | set master stack pointer + movel d0,a7@- | environp + movel d0,a7@- | argv + movel d0,a7@- | argc + jsr SYM(main) | Call C main + + | Should this just force a reset? +mainDone: nop | Leave spot for breakpoint + stop #0x2700 | Stop with interrupts disabled + bra.b mainDone | Stuck forever + + .align 2 + PUBLIC (_HeapSize) +SYM (_HeapSize): + .long HeapSize + PUBLIC (_StackSize) +SYM (_StackSize): + .long StackSize +END_CODE + +BEGIN_BSS + .align 2 + PUBLIC (environ) +SYM (environ): + .long 0 +END diff --git a/c/src/lib/libbsp/m68k/gen68360/start360/start360.s b/c/src/lib/libbsp/m68k/gen68360/start360/start360.s new file mode 100644 index 0000000000..c446784d97 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/start360/start360.s @@ -0,0 +1,393 @@ +/* entry.s + * + * This file contains the entry point for the application. + * The name of this entry point is compiler dependent. + * It jumps to the BSP which is responsible for performing + * all initialization. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + /* + * Step 1: Decide on Reset Stack Pointer and Initial Program Counter + */ +Entry: + .long SYM(m360)+1024 | 0: Initial SSP + .long start | 1: Initial PC + .long uhoh | 2: Bus error + .long uhoh | 3: Address error + .long uhoh | 4: Illegal instruction + .long uhoh | 5: Zero division + .long uhoh | 6: CHK, CHK2 instruction + .long uhoh | 7: TRAPcc, TRAPV instructions + .long uhoh | 8: Privilege violation + .long uhoh | 9: Trace + .long uhoh | 10: Line 1010 emulator + .long uhoh | 11: Line 1111 emulator + .long uhoh | 12: Hardware breakpoint + .long uhoh | 13: Reserved for coprocessor violation + .long uhoh | 14: Format error + .long uhoh | 15: Uninitialized interrupt + .long uhoh | 16: Unassigned, reserved + .long uhoh | 17: + .long uhoh | 18: + .long uhoh | 19: + .long uhoh | 20: + .long uhoh | 21: + .long uhoh | 22: + .long uhoh | 23: + .long uhoh | 24: Spurious interrupt + .long uhoh | 25: Level 1 interrupt autovector + .long uhoh | 26: Level 2 interrupt autovector + .long uhoh | 27: Level 3 interrupt autovector + .long uhoh | 28: Level 4 interrupt autovector + .long uhoh | 29: Level 5 interrupt autovector + .long uhoh | 30: Level 6 interrupt autovector + .long uhoh | 31: Level 7 interrupt autovector + .long uhoh | 32: Trap instruction (0-15) + .long uhoh | 33: + .long uhoh | 34: + .long uhoh | 35: + .long uhoh | 36: + .long uhoh | 37: + .long uhoh | 38: + .long uhoh | 39: + .long uhoh | 40: + .long uhoh | 41: + .long uhoh | 42: + .long uhoh | 43: + .long uhoh | 44: + .long uhoh | 45: + .long uhoh | 46: + .long uhoh | 47: + .long uhoh | 48: Reserved for coprocessor + .long uhoh | 49: + .long uhoh | 50: + .long uhoh | 51: + .long uhoh | 52: + .long uhoh | 53: + .long uhoh | 54: + .long uhoh | 55: + .long uhoh | 56: + .long uhoh | 57: + .long uhoh | 58: + .long uhoh | 59: Unassigned, reserved + .long uhoh | 60: + .long uhoh | 61: + .long uhoh | 62: + .long uhoh | 63: + .long uhoh | 64: User defined vectors (192) + .long uhoh | 65: + .long uhoh | 66: + .long uhoh | 67: + .long uhoh | 68: + .long uhoh | 69: + .long uhoh | 70: + .long uhoh | 71: + .long uhoh | 72: + .long uhoh | 73: + .long uhoh | 74: + .long uhoh | 75: + .long uhoh | 76: + .long uhoh | 77: + .long uhoh | 78: + .long uhoh | 79: + .long uhoh | 80: + .long uhoh | 81: + .long uhoh | 82: + .long uhoh | 83: + .long uhoh | 84: + .long uhoh | 85: + .long uhoh | 86: + .long uhoh | 87: + .long uhoh | 88: + .long uhoh | 89: + .long uhoh | 90: + .long uhoh | 91: + .long uhoh | 92: + .long uhoh | 93: + .long uhoh | 94: + .long uhoh | 95: + .long uhoh | 96: + .long uhoh | 97: + .long uhoh | 98: + .long uhoh | 99: + .long uhoh | 100: + .long uhoh | 101: + .long uhoh | 102: + .long uhoh | 103: + .long uhoh | 104: + .long uhoh | 105: + .long uhoh | 106: + .long uhoh | 107: + .long uhoh | 108: + .long uhoh | 109: + .long uhoh | 110: + .long uhoh | 111: + .long uhoh | 112: + .long uhoh | 113: + .long uhoh | 114: + .long uhoh | 115: + .long uhoh | 116: + .long uhoh | 117: + .long uhoh | 118: + .long uhoh | 119: + .long uhoh | 120: + .long uhoh | 121: + .long uhoh | 122: + .long uhoh | 123: + .long uhoh | 124: + .long uhoh | 125: + .long uhoh | 126: + .long uhoh | 127: + .long uhoh | 128: + .long uhoh | 129: + .long uhoh | 130: + .long uhoh | 131: + .long uhoh | 132: + .long uhoh | 133: + .long uhoh | 134: + .long uhoh | 135: + .long uhoh | 136: + .long uhoh | 137: + .long uhoh | 138: + .long uhoh | 139: + .long uhoh | 140: + .long uhoh | 141: + .long uhoh | 142: + .long uhoh | 143: + .long uhoh | 144: + .long uhoh | 145: + .long uhoh | 146: + .long uhoh | 147: + .long uhoh | 148: + .long uhoh | 149: + .long uhoh | 150: + .long uhoh | 151: + .long uhoh | 152: + .long uhoh | 153: + .long uhoh | 154: + .long uhoh | 155: + .long uhoh | 156: + .long uhoh | 157: + .long uhoh | 158: + .long uhoh | 159: + .long uhoh | 160: + .long uhoh | 161: + .long uhoh | 162: + .long uhoh | 163: + .long uhoh | 164: + .long uhoh | 165: + .long uhoh | 166: + .long uhoh | 167: + .long uhoh | 168: + .long uhoh | 169: + .long uhoh | 170: + .long uhoh | 171: + .long uhoh | 172: + .long uhoh | 173: + .long uhoh | 174: + .long uhoh | 175: + .long uhoh | 176: + .long uhoh | 177: + .long uhoh | 178: + .long uhoh | 179: + .long uhoh | 180: + .long uhoh | 181: + .long uhoh | 182: + .long uhoh | 183: + .long uhoh | 184: + .long uhoh | 185: + .long uhoh | 186: + .long uhoh | 187: + .long uhoh | 188: + .long uhoh | 189: + .long uhoh | 190: + .long uhoh | 191: + .long uhoh | 192: + .long uhoh | 193: + .long uhoh | 194: + .long uhoh | 195: + .long uhoh | 196: + .long uhoh | 197: + .long uhoh | 198: + .long uhoh | 199: + .long uhoh | 200: + .long uhoh | 201: + .long uhoh | 202: + .long uhoh | 203: + .long uhoh | 204: + .long uhoh | 205: + .long uhoh | 206: + .long uhoh | 207: + .long uhoh | 208: + .long uhoh | 209: + .long uhoh | 210: + .long uhoh | 211: + .long uhoh | 212: + .long uhoh | 213: + .long uhoh | 214: + .long uhoh | 215: + .long uhoh | 216: + .long uhoh | 217: + .long uhoh | 218: + .long uhoh | 219: + .long uhoh | 220: + .long uhoh | 221: + .long uhoh | 222: + .long uhoh | 223: + .long uhoh | 224: + .long uhoh | 225: + .long uhoh | 226: + .long uhoh | 227: + .long uhoh | 228: + .long uhoh | 229: + .long uhoh | 230: + .long uhoh | 231: + .long uhoh | 232: + .long uhoh | 233: + .long uhoh | 234: + .long uhoh | 235: + .long uhoh | 236: + .long uhoh | 237: + .long uhoh | 238: + .long uhoh | 239: + .long uhoh | 240: + .long uhoh | 241: + .long uhoh | 242: + .long uhoh | 243: + .long uhoh | 244: + .long uhoh | 245: + .long uhoh | 246: + .long uhoh | 247: + .long uhoh | 248: + .long uhoh | 249: + .long uhoh | 250: + .long uhoh | 251: + .long uhoh | 252: + .long uhoh | 253: + .long uhoh | 254: + .long uhoh | 255: + +/* + * Default trap handler + * With an oscilloscope you can see AS* stop + */ +uhoh: nop | Leave spot for breakpoint + stop #0x2700 | Stop with interrupts disabled + bra.b uhoh | Stuck forever + +/* + * Place the low-order 3 octets of the board's + * ethernet address at a `well-known' location. + */ + .align 2 +| .long ETHERNET_ADDRESS | 08: Low-order 3 octets + +/* + * Initial PC + */ +start: + /* + * Step 2: Stay in Supervisor Mode + * (i.e. just do nothing for this step) + */ + + /* + * Step 3: Write the VBR + */ + lea Entry,a0 | Get base of vector table + movec a0,VBR | Set up the VBR + + /* + * Step 4: Write the MBAR + */ + movec DFC,d1 | Save destination register + moveq #7,d0 | CPU-space funcction code + movec d0,DFC | Set destination function code register + movel #SYM(m360)+0x101,d0 | MBAR value (mask CPU space accesses) + movesl d0,0x3FF00 | Set MBAR + movec d1,DFC | Restore destination register + + /* + * Step 5: Verify a dual-port RAM location + */ + lea SYM(m360),a0 | Point a0 to first DPRAM location + moveb #0x33,d0 | Set the test value + moveb d0,a0@ | Set the memory location + cmpb a0@,d0 | Does it read back? + bne uhoh | If not, bad news! + notb d0 | Flip bits + moveb d0,a0@ | Set the memory location + cmpb a0@,d0 | Does it read back? + bne uhoh | If not, bad news! + + /* + * Remaining steps are handled by C code + */ + jmp SYM(_Init68360) | Start C code (which never returns) + + +/* + * Clear BSS, set up real stack, initialize heap, start C program + * Assume that BSS size is a multiple of 4. + * FIXME: The zero-loop should be changed to put the CPU into loop-mode. + * FIXME: PROM-based systems will have to copy data segment to RAM here + */ + PUBLIC (_ClearBSSAndStart) +SYM(_ClearBSSAndStart): + movel #clear_start,a0 + movel #clear_end,a1 + clrl d0 + brab ZEROLOOPTEST +ZEROLOOP: + movel d0,a0@+ +ZEROLOOPTEST: + cmpl a1,a0 + bcsb ZEROLOOP + movel #stack_init,a7 | set master stack pointer + movel d0,a7@- | environp + movel d0,a7@- | argv + movel d0,a7@- | argc + jsr SYM(main) | Call C main + + | Should this just force a reset? +mainDone: nop | Leave spot for breakpoint + stop #0x2700 | Stop with interrupts disabled + bra.b mainDone | Stuck forever + + .align 2 + PUBLIC (_HeapSize) +SYM (_HeapSize): + .long HeapSize + PUBLIC (_StackSize) +SYM (_StackSize): + .long StackSize +END_CODE + +BEGIN_BSS + .align 2 + PUBLIC (environ) +SYM (environ): + .long 0 +END diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c new file mode 100644 index 0000000000..d741ad47dc --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspclean.c @@ -0,0 +1,27 @@ +/* bsp_cleanup() + * + * This routine normally is part of start.s and usually returns + * control to a monitor. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +void bsp_cleanup( void ) +{ + /* Cause double bus fault to force reset? */ +} diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c new file mode 100644 index 0000000000..eac52ce9f5 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/startup/bspstart.c @@ -0,0 +1,247 @@ +/* bsp_start() + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +#include + +#include +#include + +#ifdef STACK_CHECKER_ON +#include +#endif + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +char *rtems_progname; + +/* Initialize whatever libc we are using + * called from postdriver hook + */ + +void bsp_libc_init() +{ + extern void *_HeapStart; + extern rtems_unsigned32 _HeapSize; + + /* + * The last parameter to RTEMS_Malloc_Initialize is the "chunk" + * size which a multiple of will be requested on each sbrk() + * call by malloc(). A value of 0 indicates that sbrk() should + * not be called to extend the heap. + */ + + RTEMS_Malloc_Initialize(&_HeapStart, _HeapSize, 0); + + /* + * Init the RTEMS libio facility to provide UNIX-like system + * calls for use by newlib (ie: provide __open, __close, etc) + * Uses malloc() to get area for the iops, so must be after malloc init + */ + + rtems_libio_init(); + + /* + * Set up for the libc handling. + */ + + if (BSP_Configuration.ticks_per_timeslice > 0) + libc_init(1); /* reentrant if possible */ + else + libc_init(0); /* non-reentrant */ +} + +/* + * Function: bsp_pretasking_hook + * Created: 95/03/10 + * + * Description: + * BSP pretasking hook. Called just before drivers are initialized. + * Used to setup libc and install any BSP extensions. + * + * NOTES: + * Must not use libc (to do io) from here, since drivers are + * not yet initialized. + * + */ + +void +bsp_pretasking_hook(void) +{ + bsp_libc_init(); + +#ifdef STACK_CHECKER_ON + /* + * Initialize the stack bounds checker + * We can either turn it on here or from the app. + */ + + Stack_check_Initialize(); +#endif + +#ifdef RTEMS_DEBUG + rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); +#endif +} + + +/* + * After drivers are setup, register some "filenames" + * and open stdin, stdout, stderr files + * + * Newlib will automatically associate the files with these + * (it hardcodes the numbers) + */ + +void +bsp_postdriver_hook(void) +{ + int stdin_fd, stdout_fd, stderr_fd; + int error_code; + + error_code = 'S' << 24 | 'T' << 16; + + if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1) + rtems_fatal_error_occurred( error_code | 'D' << 8 | '0' ); + + if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1) + rtems_fatal_error_occurred( error_code | 'D' << 8 | '1' ); + + if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1) + rtems_fatal_error_occurred( error_code | 'D' << 8 | '2' ); + + if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2)) + rtems_fatal_error_occurred( error_code | 'I' << 8 | 'O' ); +} + +int main( + int argc, + char **argv, + char **environp +) +{ + extern void *_WorkspaceBase; + if ((argc > 0) && argv && argv[0]) + rtems_progname = argv[0]; + else + rtems_progname = "RTEMS"; + + /* + * Allocate the memory for the RTEMS Work Space. This can come from + * a variety of places: hard coded address, malloc'ed from outside + * RTEMS world (e.g. simulator or primitive memory manager), or (as + * typically done by stock BSPs) by subtracting the required amount + * of work space from the last physical address on the CPU board. + */ +#if 0 + Cpu_table.interrupt_vector_table = (mc68000_isr *) 0/*&M68Kvec*/; +#endif + + + /* + * Copy the Configuration Table .. so we can change it + */ + + BSP_Configuration = Configuration; + + /* + * Add 1 region for the RTEMS Malloc + */ + + BSP_Configuration.maximum_regions++; + + /* + * Add 1 extension for newlib libc + */ + +#ifdef RTEMS_NEWLIB + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Add another extension if using the stack checker + */ + +#ifdef STACK_CHECKER_ON + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Tell libio how many fd's we want and allow it to tweak config + */ + + rtems_libio_config(&BSP_Configuration, BSP_LIBIO_MAX_FDS); + + /* + * Need to "allocate" the memory for the RTEMS Workspace and + * tell the RTEMS configuration where it is. This memory is + * not malloc'ed. It is just "pulled from the air". + */ + + BSP_Configuration.work_space_start = (void *)&_WorkspaceBase; + + /* + * initialize the CPU table for this BSP + */ + + /* + * we do not use the pretasking_hook + */ + + Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ + + Cpu_table.predriver_hook = NULL; + + Cpu_table.postdriver_hook = bsp_postdriver_hook; + + Cpu_table.idle_task = NULL; /* do not override system IDLE task */ + + Cpu_table.do_zero_of_workspace = TRUE; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.extra_system_initialization_stack = 0; + + /* + * Don't forget the other CPU Table entries. + */ + + /* + * Start RTEMS + */ + + rtems_initialize_executive( &BSP_Configuration, &Cpu_table ); + + bsp_cleanup(); + + return 0; +} diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c new file mode 100644 index 0000000000..71474c319e --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/startup/init68360.c @@ -0,0 +1,172 @@ +/* + * Initialize 68360 hardware + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +#include +#include +#include "mc68360.h" + +void +_Init68360 (void) +{ + int i; + extern void *_RomBase, *_RamBase; + m68k_isr_entry *vbr; + extern void _ClearBSSAndStart (void); + + /* + * Step 6: Is this a power-up reset? + * For now we just ignore this and do *all* the steps + * Someday we might want to: + * if (Hard, Loss of Clock, Power-up) + * Do all steps + * else if (Double bus fault, watchdog or soft reset) + * Skip to step 12 + * else (must be a CPU32+ reset command) + * Skip to step 14 + */ + + /* + * Step 7: Deal with clock synthesizer + * HARDWARE: + * Change if you're not using an external 25 MHz oscillator. + */ + m360.clkocr = 0x8F; /* No more writes, no clock outputs */ + m360.pllcr = 0xD000; /* PLL, no writes, no prescale, */ + /* no LPSTOP slowdown, PLL X1 */ + m360.cdvcr = 0x8000; /* No more writes, no clock division */ + + /* + * Step 8: Initialize system protection + * Disable watchdog FIXME: Should use watchdog!!!! + * Watchdog causes system reset + * Fastest watchdog timeout + * Enable double bus fault monitor + * Enable bus monitor external + * 128 clocks for external timeout + */ + m360.sypcr = 0x4F; + + /* + * Step 9: Clear parameter RAM and reset communication processor module + */ + for (i = 0 ; i < 192 ; i += sizeof (long)) { + *((long *)((char *)&m360 + 0xC00 + i)) = 0; + *((long *)((char *)&m360 + 0xD00 + i)) = 0; + *((long *)((char *)&m360 + 0xE00 + i)) = 0; + *((long *)((char *)&m360 + 0xF00 + i)) = 0; + } + m360.cr = M360_CR_RST | M360_CR_FLG; + + /* + * Step 10: Write PEPAR + * SINTOUT not used (CPU32+ mode) + * CF1MODE=00 (CONFIG1 input) + * RAS1* double drive + * A31-A28 + * OE* output + * CAS2* / CAS3* + * CAS0* / CAS1* + * CS7* + * AVEC* + * HARDWARE: + * Change if you are using a different memory configuration + * (static RAM, external address multiplexing, etc). + */ + m360.pepar = 0x0100; + + /* + * Step 11: Remap Chip Select 0 (CS0*), set up GMR + * 1024 addresses per DRAM page (1M DRAM chips) + * 60 nsec DRAM + * 180 nsec ROM (3 wait states) + * HARDWARE: + * Change if you are using a different memory configuration + */ + m360.gmr = M360_GMR_RCNT(24) | M360_GMR_RFEN | M360_GMR_RCYC(0) | + M360_GMR_PGS(3) | M360_GMR_DPS_32BIT | M360_GMR_NCS | + M360_GMR_GAMX; + m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP | + M360_MEMC_BR_V; + m360.memc[0].or = M360_MEMC_OR_WAITS(3) | M360_MEMC_OR_512KB | + M360_MEMC_OR_8BIT; + + /* + * Step 12: Initialize the system RAM + * Set up option/base registers + * 4 MB DRAM + * 60 nsec DRAM + * Wait for chips to power up + * Perform 8 read cycles + * Set all parity bits to correct state + * Enable parity checking + * HARDWARE: + * Change if you are using a different memory configuration + */ + m360.memc[1].or = M360_MEMC_OR_TCYC(0) | M360_MEMC_OR_4MB | + M360_MEMC_OR_DRAM; + m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_V; + for (i = 0; i < 50000; i++) + continue; + for (i = 0; i < 8; ++i) + *((volatile unsigned long *)(unsigned long)&_RamBase); + for (i = 0 ; i < 4*1024*1024 ; i += sizeof (unsigned long)) { + volatile unsigned long *lp; + lp = (unsigned long *)((unsigned char *)&_RamBase + i); + *lp = *lp; + } + m360.memc[1].br = (unsigned long)&_RamBase | M360_MEMC_BR_PAREN | + M360_MEMC_BR_V; + + /* + * Step 13: Copy the exception vector table to system RAM + */ + asm volatile ("movec vbr,%0" : "=r" (vbr) : ); + for (i = 0; i < 256; ++i) + M68Kvec[i] = vbr[i]; + asm volatile ("movec %0,vbr" : : "r" (M68Kvec)); + + /* + * Step 14: More system initialization + * SDCR (Serial DMA configuratin register) + * Give SDMA priority over all interrupt handlers + * Set DMA arbiration level to 4 + * CICR (CPM interrupt configuration register): + * SCC1 requests at SCCa position + * SCC2 requests at SCCb position + * SCC3 requests at SCCc position + * SCC4 requests at SCCd position + * Interrupt request level 4 + * Maintain original priority order + * Vector base 128 + * SCCs priority grouped at top of table + */ + m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4; + m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) | + (4 << 13) | (0x1F << 8) | (128); + + /* + * Step 15: Set module configuration register + * Disable timers during FREEZE + * Enable bus monitor during FREEZE + * BCLRO* arbitration level 3 + * No show cycles + * User/supervisor access + * Bus clear interupt service level 7 + * SIM60 interrupt sources higher priority than CPM + */ + m360.mcr = 0x4C7F; + + /* + * Clear BSS, switch stacks and call main() + */ + _ClearBSSAndStart (); +} diff --git a/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds b/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds new file mode 100644 index 0000000000..0eb212d4b8 --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/startup/linkcmds @@ -0,0 +1,77 @@ +/* + * This file contains GNU linker directives for a generic MC68360 board. + * + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +/* + * Declare on-board memory + */ +MEMORY { + ram : ORIGIN = 0x00000000, LENGTH = 4M + rom : ORIGIN = 0xFF000000, LENGTH = 1M + dpram : ORIGIN = 0xFE000000, LENGTH = 8k +} + +/* + * Declare some sizes + */ +HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000; +StackSize = DEFINED(StackSize) ? StackSize : 0x1000; + +/* + * Load objects + */ +SECTIONS { + .text : { + __RamBase = .; + CREATE_OBJECT_SYMBOLS + *(.text) + . = ALIGN (16); + _etext = .; + } >ram + .data : { + *(.data) + . = ALIGN (16); + _edata = .; + } >ram + .bss : { + _M68Kvec = .; + . += (256 * 4); + clear_start = .; + *(.bss) + *(COMMON) + . = ALIGN (16); + _end = .; + + __HeapStart = .; + . += HeapSize; + . += StackSize; + . = ALIGN (16); + stack_init = .; + clear_end = .; + + __WorkspaceBase = .; + } >ram + + /* + * On-chip memory/peripherals + */ + dpram : { + _m360 = .; + . += (8 * 1024); + + } >dpram + + /* + * Boot PROM + */ + rom : { + __RomBase = .; + } >rom +} diff --git a/c/src/lib/libbsp/m68k/gen68360/timer/timer.c b/c/src/lib/libbsp/m68k/gen68360/timer/timer.c new file mode 100644 index 0000000000..13a14e106e --- /dev/null +++ b/c/src/lib/libbsp/m68k/gen68360/timer/timer.c @@ -0,0 +1,95 @@ +/* + * Timer_init() + * + * Use TIMER 1 and TIMER 2 for Timing Test Suite + * + * The hardware on the MC68360 makes these routines very simple. + * + * Based on the `gen68302' board support package, and covered by the + * original distribution terms. + * + * W. Eric Norum + * Saskatchewan Accelerator Laboratory + * University of Saskatchewan + * Saskatoon, Saskatchewan, CANADA + * eric@skatter.usask.ca + * + * $Id$ + */ + +/* + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * NOTE: It is important that the timer start/stop overhead be + * determined when porting or modifying this code. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + */ + +#include +#include +#include "mc68360.h" + +void +Timer_initialize (void) +{ + /* + * Reset timers 1 and 2 + */ + m360.tgcr &= ~0x00FF; + m360.tcn1 = 0; + m360.tcn2 = 0; + m360.ter1 = 0xFFFF; + m360.ter2 = 0xFFFF; + + /* + * Cascade timers 1 and 2 + */ + m360.tgcr |= 0x0080; + + /* + * Configure timers 1 and 2 to a single 32-bit, 1 MHz timer. + * HARDWARE: + * Change the `25' to match your processor clock + */ + m360.tmr2 = ((25-1) << 8) | 0x2; + m360.tmr1 = 0; + + /* + * Start the timers + */ + m360.tgcr |= 0x0011; +} + +/* + * Return timer value in microsecond units + */ +int +Read_timer (void) +{ + return *(rtems_unsigned32 *)&m360.tcn1; +} + +/* + * Empty function call used in loops to measure basic cost of looping + * in Timing Test Suite. + */ +rtems_status_code +Empty_function (void) +{ + return RTEMS_SUCCESSFUL; +} + +void +Set_find_average_overhead(rtems_boolean find_flag) +{ +} -- cgit v1.2.3