From 356b2c23f51a93b12db3fa6d1f670c5ca5acd847 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 4 Mar 2016 15:40:49 -0600 Subject: pc386: Add PCI UART support --- c/src/lib/libbsp/i386/pc386/Makefile.am | 1 + c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c | 398 +++++++++++++++++++++ c/src/lib/libbsp/i386/pc386/include/bsp.h | 4 + c/src/lib/libbsp/i386/pc386/startup/bspstart.c | 5 + 4 files changed, 408 insertions(+) create mode 100644 c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c (limited to 'c') diff --git a/c/src/lib/libbsp/i386/pc386/Makefile.am b/c/src/lib/libbsp/i386/pc386/Makefile.am index fc73afdbe9..c54307f28c 100644 --- a/c/src/lib/libbsp/i386/pc386/Makefile.am +++ b/c/src/lib/libbsp/i386/pc386/Makefile.am @@ -130,6 +130,7 @@ libbsp_a_SOURCES += console/conscfg.c libbsp_a_SOURCES += console/printk_support.c libbsp_a_SOURCES += console/exar17d15x.c libbsp_a_SOURCES += console/rtd316.c +libbsp_a_SOURCES += console/uart_bus_pci.c # gdb libbsp_a_SOURCES += ../../i386/shared/comm/i386-stub.c diff --git a/c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c b/c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c new file mode 100644 index 0000000000..36afb73c46 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c @@ -0,0 +1,398 @@ +/* + * This file was brought over from FreeBSD for the PCI device table. + * The code for using the table is RTEMS specific is also under the + * FreeBSD license. + * + * COPYRIGHT (c) 1989-2012. + * On-Line Applications Research Corporation (OAR). + */ + +/*- + * Copyright (c) 2006 Marcel Moolenaar + * Copyright (c) 2001 M. Warner Losh + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifdef __rtems__ +#include +#include +#else +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#endif + +#define DEFAULT_RCLK 1843200 + +#ifndef __rtems__ +static int uart_pci_probe(device_t dev); + +static device_method_t uart_pci_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, uart_pci_probe), + DEVMETHOD(device_attach, uart_bus_attach), + DEVMETHOD(device_detach, uart_bus_detach), + DEVMETHOD(device_resume, uart_bus_resume), + DEVMETHOD_END +}; + +static driver_t uart_pci_driver = { + uart_driver_name, + uart_pci_methods, + sizeof(struct uart_softc), +}; +#endif + +struct pci_id { + uint16_t vendor; + uint16_t device; + uint16_t subven; + uint16_t subdev; + const char *desc; + int rid; + int rclk; + int regshft; +}; + +static const struct pci_id pci_ns8250_ids[] = { +{ 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14, + 128 * DEFAULT_RCLK }, +{ 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14, + 128 * DEFAULT_RCLK }, +{ 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 }, +{ 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 }, +{ 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2", + 0x10 }, +{ 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 }, +{ 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 }, +{ 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 }, +{ 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 }, +{ 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 }, +{ 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 }, +{ 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 }, +{ 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 }, +{ 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 }, +{ 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 }, +{ 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 }, +{ 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 }, +{ 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 }, +{ 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 }, +{ 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 }, +{ 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530", + 0x18 }, +{ 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 }, +{ 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 }, +{ 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 }, +{ 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART", + 0x10, 16384000 }, +{ 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART", + 0x10 }, +{ 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10}, +{ 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 }, +{ 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10, + 8 * DEFAULT_RCLK }, +{ 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10, + 24 * DEFAULT_RCLK, 2 }, +{ 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10, + 24 * DEFAULT_RCLK, 2 }, +{ 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 }, +{ 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 0x10 }, +{ 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 }, +{ 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 }, +{ 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 }, +{ 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller", + 0x10 }, +{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 }, +{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 }, +{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 }, +{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 }, +{ 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 }, +{ 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 }, +{ 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 }, +{ 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 }, +{ 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 }, +{ 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 }, +{ 0x9710, 0x9900, 0xa000, 0x1000, + "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 }, +{ 0x9710, 0x9901, 0xa000, 0x1000, + "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 }, +{ 0x9710, 0x9904, 0xa000, 0x1000, + "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 }, +{ 0x9710, 0x9922, 0xa000, 0x1000, + "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 }, +{ 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 }, +{ 0xffff, 0, 0xffff, 0, NULL, 0, 0} +}; + +#ifndef __rtems__ +const static struct pci_id * +uart_pci_match(device_t dev, const struct pci_id *id) +{ + uint16_t device, subdev, subven, vendor; + + vendor = pci_get_vendor(dev); + device = pci_get_device(dev); + while (id->vendor != 0xffff && + (id->vendor != vendor || id->device != device)) + id++; + if (id->vendor == 0xffff) + return (NULL); + if (id->subven == 0xffff) + return (id); + subven = pci_get_subvendor(dev); + subdev = pci_get_subdevice(dev); + while (id->vendor == vendor && id->device == device && + (id->subven != subven || id->subdev != subdev)) + id++; + return ((id->vendor == vendor && id->device == device) ? id : NULL); +} + +static int +uart_pci_probe(device_t dev) +{ + struct uart_softc *sc; + const struct pci_id *id; + int result; + + sc = device_get_softc(dev); + + id = uart_pci_match(dev, pci_ns8250_ids); + if (id != NULL) { + sc->sc_class = &uart_ns8250_class; + goto match; + } + /* Add checks for non-ns8250 IDs here. */ + return (ENXIO); + + match: + result = uart_bus_probe(dev, id->regshft, id->rclk, id->rid, 0); + /* Bail out on error. */ + if (result > 0) + return (result); + /* Set/override the device description. */ + if (id->desc) + device_set_desc(dev, id->desc); + return (result); +} + +DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL); +#endif + +#ifdef __rtems__ + +#include +// #include +#include +#include + +// #include +#include +#include +#include +#include +#include "../../../shared/console_private.h" + +#define MAX_BOARDS 4 + +/* + * Information saved from PCI scan + */ +typedef struct { + bool found; + uint32_t base; + uint8_t irq; + uint8_t bus; + uint8_t slot; + int ports; + uint32_t clock; +} port_instance_conf_t; + +/* + * Register Access Routines + */ +static uint8_t pci_ns16550_get_register(uint32_t addr, uint8_t i) +{ + uint8_t val = 0; + volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4)); + + val = *reg; + /* printk( "RD(%p -> 0x%02x) ", reg, val ); */ + return val; +} + +static void pci_ns16550_set_register(uint32_t addr, uint8_t i, uint8_t val) +{ + volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4)); + + /* printk( "WR(%p <- 0x%02x) ", reg, val ); */ + *reg = val; +} + +void pci_uart_probe(void) +{ + port_instance_conf_t conf[MAX_BOARDS]; + int boards = 0; + int b = 0; + console_tbl *ports; + console_tbl *port_p; + int bus; + int dev; + int fun; + int status; + int instance; + int i; + int total_ports = 0; + + for ( b=0 ; bsDeviceName = strdup( name ); + port_p->deviceType = SERIAL_NS16550; + if ( conf[b].irq <= 15 ) { + port_p->pDeviceFns = &ns16550_fns; + } else { + printk( + "%s IRQ=%d >= 16 requires APIC support, using polling\n", + name, + conf[b].irq <= 15 + ); + port_p->pDeviceFns = &ns16550_fns_polled; + } + + port_p->deviceProbe = NULL; + port_p->pDeviceFlow = NULL; + port_p->ulMargin = 16; + port_p->ulHysteresis = 8; + port_p->pDeviceParams = (void *) 9600; + port_p->ulCtrlPort1 = conf[b].base; + port_p->ulCtrlPort2 = 0; /* NA */ + port_p->ulDataPort = 0; /* NA */ + port_p->getRegister = pci_ns16550_get_register; + port_p->setRegister = pci_ns16550_set_register; + port_p->getData = NULL; /* NA */ + port_p->setData = NULL; /* NA */ + port_p->ulClock = conf[b].clock; + port_p->ulIntVector = conf[b].irq; + + port_p++; + } /* end boards */ + + /* + * Register the devices + */ + if ( boards ) + console_register_devices( ports, total_ports ); +} +#endif diff --git a/c/src/lib/libbsp/i386/pc386/include/bsp.h b/c/src/lib/libbsp/i386/pc386/include/bsp.h index ed5c31947e..9fb38587da 100644 --- a/c/src/lib/libbsp/i386/pc386/include/bsp.h +++ b/c/src/lib/libbsp/i386/pc386/include/bsp.h @@ -287,6 +287,10 @@ const pci_config_access_functions *pci_io_initialize(void); */ void pc386_parse_console_arguments(void); +/* + * Dynamically probe for PCI UARTS + */ +void pci_uart_probe(void); #ifdef __cplusplus } diff --git a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c index 7cd859f686..4803df83c8 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/bspstart.c +++ b/c/src/lib/libbsp/i386/pc386/startup/bspstart.c @@ -107,6 +107,11 @@ static void bsp_start_default( void ) */ bsp_pci_initialize_helper(); + /* + * Probe for UARTs on PCI. One of these may end up as the console. + */ + pci_uart_probe(); + /* * Figure out where printk() and console IO is to be directed. * Do this after the PCI bus is initialized so we have a chance -- cgit v1.2.3