From 34f5067fefba3d1eba4b1f493a04a52580cbf797 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 8 Mar 2002 16:32:39 +0000 Subject: 2002-03-05 Greg Menke * shared/interrupts/installisrentries.c: Added support for debug exception vector. * shared/interrupts/isr_entries.S: Added support for debug exception vector. --- c/src/lib/libcpu/mips/ChangeLog | 7 +++++++ c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c | 4 ++++ c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S | 6 ++++++ 3 files changed, 17 insertions(+) (limited to 'c') diff --git a/c/src/lib/libcpu/mips/ChangeLog b/c/src/lib/libcpu/mips/ChangeLog index 84477e631c..6614f12331 100644 --- a/c/src/lib/libcpu/mips/ChangeLog +++ b/c/src/lib/libcpu/mips/ChangeLog @@ -1,3 +1,10 @@ +2002-03-05 Greg Menke + + * shared/interrupts/installisrentries.c: Added support for debug + exception vector. + * shared/interrupts/isr_entries.S: Added support for debug exception + vector. + 2002-02-27 Greg Menke * mongoosev/include/mongoose-v.h: Added cache constants. diff --git a/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c b/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c index b216e21066..6f692e1aba 100644 --- a/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c +++ b/c/src/lib/libcpu/mips/shared/interrupts/installisrentries.c @@ -10,10 +10,13 @@ void mips_install_isr_entries( void ) { #if __mips == 1 void exc_utlb_code(void); + void exc_dbg_code(void); void exc_norm_code(void); memcpy( (void *)UT_VEC, exc_utlb_code, 40 ); /* utlbmiss vector */ + memcpy( (void *)DB_VEC, exc_dbg_code, 40 ); memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vevtor */ + #elif __mips == 3 void exc_tlb_code(void); void exc_xtlb_code(void); @@ -25,5 +28,6 @@ void mips_install_isr_entries( void ) memcpy( (void *)C_VEC, exc_cache_code, 40 ); /* cache error vector */ memcpy( (void *)E_VEC, exc_norm_code, 40 ); /* exception vector */ #endif + rtems_cache_flush_entire_data(); } diff --git a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S index e27b35e984..25ee7793d5 100644 --- a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S +++ b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S @@ -27,6 +27,12 @@ FRAME(exc_norm_code,sp,0,ra) nop ENDFRAME(exc_norm_code) +FRAME(exc_dbg_code,sp,0,ra) + la k0, _DBG_Handler /* debug interrupt */ + j k0 + nop +ENDFRAME(exc_dbg_code) + /* XXX this is dependent on IDT/SIM and needs to be addressed */ FRAME(exc_utlb_code,sp,0,ra) la k0, (R_VEC+((48)*8)) -- cgit v1.2.3